source: rtems/c/src/lib/libbsp/arm/shared/start/start.S @ cfd8d7a

4.115
Last change on this file since cfd8d7a was cfd8d7a, checked in by Sebastian Huber <sebastian.huber@…>, on 05/08/13 at 07:30:31

arm: Support VFP-D32 and Neon
  • Property mode set to 100644
File size: 6.1 KB
Line 
1/**
2 * @file
3 *
4 * @brief Boot and system start code.
5 */
6
7/*
8 * Copyright (c) 2008-2013 embedded brains GmbH.  All rights reserved.
9 *
10 *  embedded brains GmbH
11 *  Obere Lagerstr. 30
12 *  82178 Puchheim
13 *  Germany
14 *  <rtems@embedded-brains.de>
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.com/license/LICENSE.
19 */
20
21#include <rtems/asm.h>
22#include <rtems/system.h>       
23#include <rtems/score/cpu.h>
24       
25#include <bspopts.h>
26#include <bsp/irq.h>
27#include <bsp/linker-symbols.h>
28
29        /* External symbols */
30        .extern bsp_reset
31        .extern boot_card
32        .extern bsp_start_hook_0
33        .extern bsp_start_hook_1
34        .extern _ARMV4_Exception_undef_default
35        .extern _ARMV4_Exception_swi_default
36        .extern _ARMV4_Exception_data_abort_default
37        .extern _ARMV4_Exception_pref_abort_default
38        .extern _ARMV4_Exception_reserved_default
39        .extern _ARMV4_Exception_irq_default
40        .extern _ARMV4_Exception_fiq_default
41        .extern _ARMV7M_Exception_default
42
43        /* Global symbols */
44        .globl  _start
45        .globl  bsp_start_vector_table_begin
46        .globl  bsp_start_vector_table_end
47        .globl  bsp_start_vector_table_size
48        .globl  bsp_vector_table_size
49
50        .section        ".bsp_start_text", "ax"
51
52#if defined(ARM_MULTILIB_ARCH_V4)
53
54        .arm
55
56/*
57 * This is the exception vector table and the pointers to the default
58 * exceptions handlers.
59 */
60
61bsp_start_vector_table_begin:
62
63        ldr     pc, handler_addr_reset
64        ldr     pc, handler_addr_undef
65        ldr     pc, handler_addr_swi
66        ldr     pc, handler_addr_prefetch
67        ldr     pc, handler_addr_abort
68
69        /* Program signature checked by boot loader */
70        .word   0xb8a06f58
71
72        ldr     pc, handler_addr_irq
73        ldr     pc, handler_addr_fiq
74
75handler_addr_reset:
76
77#ifdef BSP_START_RESET_VECTOR
78        .word   BSP_START_RESET_VECTOR
79#else
80        .word   _start
81#endif
82
83handler_addr_undef:
84
85        .word   _ARMV4_Exception_undef_default
86
87handler_addr_swi:
88
89        .word   _ARMV4_Exception_swi_default
90
91handler_addr_prefetch:
92
93        .word   _ARMV4_Exception_data_abort_default
94
95handler_addr_abort:
96
97        .word   _ARMV4_Exception_pref_abort_default
98
99handler_addr_reserved:
100
101        .word   _ARMV4_Exception_reserved_default
102
103handler_addr_irq:
104
105        .word   _ARMV4_Exception_irq_default
106
107handler_addr_fiq:
108
109        .word   _ARMV4_Exception_fiq_default
110
111bsp_start_vector_table_end:
112
113/* Start entry */
114
115_start:
116
117        /*
118         * We do not save the context since we do not return to the boot
119         * loader.
120         */
121
122        /*
123         * Set SVC mode, disable interrupts and enable ARM instructions.
124         */
125        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
126        msr     cpsr, r0
127
128        /* Initialize stack pointer registers for the various modes */
129
130        /* Enter IRQ mode and set up the IRQ stack pointer */
131        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
132        msr     cpsr, r0
133        ldr     sp, =bsp_stack_irq_end
134
135        /* Enter FIQ mode and set up the FIQ stack pointer */
136        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
137        msr     cpsr, r0
138        ldr     sp, =bsp_stack_fiq_end
139
140        /* Enter ABT mode and set up the ABT stack pointer */
141        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
142        msr     cpsr, r0
143        ldr     sp, =bsp_stack_abt_end
144
145        /* Enter UND mode and set up the UND stack pointer */
146        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
147        msr     cpsr, r0
148        ldr     sp, =bsp_stack_und_end
149
150        /* Enter SVC mode and set up the SVC stack pointer */
151        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
152        msr     cpsr, r0
153        ldr     sp, =bsp_stack_svc_end
154
155        /* Stay in SVC mode */
156
157#ifdef ARM_MULTILIB_VFP_D32
158        /* Read CPACR */
159        mrc p15, 0, r0, c1, c0, 2
160
161        /* Enable CP10 and CP11 */
162        orr r0, r0, #(1 << 20)
163        orr r0, r0, #(1 << 22)
164
165        /* Clear ASEDIS and D32DIS */
166        bic r0, r0, #(3 << 30)
167
168        /* Write CPACR */
169        mcr p15, 0, r0, c1, c0, 2
170        isb
171
172        /* Enable FPU */
173        mov r0, #(1 << 30)
174        vmsr FPEXC, r0
175#endif
176
177        /*
178         * Branch to start hook 0.
179         *
180         * The previous code and parts of the start hook 0 may run with an
181         * address offset.  This implies that only branches relative to the
182         * program counter are allowed.  After the start hook 0 it is assumed
183         * that the code can run at its intended position.  Thus the link
184         * register will be loaded with the absolute address.  In THUMB mode
185         * the start hook 0 must be within a 2kByte range due to the branch
186         * instruction limitation.
187         */
188
189        ldr     lr, =bsp_start_hook_0_done
190#ifdef __thumb__
191        orr     lr, #1
192#endif
193
194        SWITCH_FROM_ARM_TO_THUMB        r0
195
196        b       bsp_start_hook_0
197
198bsp_start_hook_0_done:
199
200        SWITCH_FROM_THUMB_TO_ARM
201
202        /*
203         * Initialize the exception vectors.  This includes the exceptions
204         * vectors and the pointers to the default exception handlers.
205         */
206
207        ldr     r0, =bsp_vector_table_begin
208        adr     r1, bsp_start_vector_table_begin
209        cmp     r0, r1
210        beq     bsp_vector_table_copy_done
211        ldmia   r1!, {r2-r9}
212        stmia   r0!, {r2-r9}
213        ldmia   r1!, {r2-r9}
214        stmia   r0!, {r2-r9}
215
216bsp_vector_table_copy_done:
217
218        SWITCH_FROM_ARM_TO_THUMB        r0
219
220        /* Branch to start hook 1 */
221        bl      bsp_start_hook_1
222
223        /* Branch to boot card */
224        mov     r0, #0
225        bl      boot_card
226
227twiddle:
228
229        /* Branch to reset function */
230        bl      bsp_reset
231
232        b       twiddle
233
234#elif defined(ARM_MULTILIB_ARCH_V7M)
235
236        .syntax unified
237
238        .extern bsp_stack_main_end
239
240        .thumb
241
242bsp_start_vector_table_begin:
243
244        .word   bsp_stack_main_end
245        .word   _start /* Reset */
246        .word   _ARMV7M_Exception_default /* NMI */
247        .word   _ARMV7M_Exception_default /* Hard Fault */
248        .word   _ARMV7M_Exception_default /* MPU Fault */
249        .word   _ARMV7M_Exception_default /* Bus Fault */
250        .word   _ARMV7M_Exception_default /* Usage Fault */
251        .word   _ARMV7M_Exception_default /* Reserved */
252        .word   _ARMV7M_Exception_default /* Reserved */
253        .word   _ARMV7M_Exception_default /* Reserved */
254        .word   _ARMV7M_Exception_default /* Reserved */
255        .word   _ARMV7M_Exception_default /* SVC */
256        .word   _ARMV7M_Exception_default /* Debug Monitor */
257        .word   _ARMV7M_Exception_default /* Reserved */
258        .word   _ARMV7M_Exception_default /* PendSV */
259        .word   _ARMV7M_Exception_default /* SysTick */
260        .rept   BSP_INTERRUPT_VECTOR_MAX + 1
261        .word   _ARMV7M_Exception_default /* IRQ */
262        .endr
263
264bsp_start_vector_table_end:
265
266        .thumb_func
267
268_start:
269
270        ldr     sp, =bsp_stack_main_end
271        ldr     lr, =bsp_start_hook_0_done + 1
272        b       bsp_start_hook_0
273
274bsp_start_hook_0_done:
275
276        bl      bsp_start_hook_1
277        movs    r0, #0
278        bl      boot_card
279
280twiddle:
281
282        bl      bsp_reset
283        b       twiddle
284
285#endif /* defined(ARM_MULTILIB_ARCH_V7M) */
286
287        .set    bsp_start_vector_table_size, bsp_start_vector_table_end - bsp_start_vector_table_begin
288        .set    bsp_vector_table_size, bsp_start_vector_table_size
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