source: rtems/c/src/lib/libbsp/arm/shared/start/start.S @ 4c622e5

4.115
Last change on this file since 4c622e5 was 4c622e5, checked in by Sebastian Huber <sebastian.huber@…>, on 11/08/11 at 10:18:19

2011-11-08 Sebastian Huber <sebastian.huber@…>

  • shared/startup/bsp-start-copy-sections.c, shared/startup/bsp-start-memcpy.S: New files.
  • shared/include/start.h: Declare bsp_start_copy_sections().
  • shared/start/start.S, shared/include/linker-symbols.h: Moved content. Support for ARMv7-M.
  • Property mode set to 100644
File size: 5.0 KB
Line 
1/**
2 * @file
3 *
4 * @brief Boot and system start code.
5 */
6
7/*
8 * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
9 *
10 *  embedded brains GmbH
11 *  Obere Lagerstr. 30
12 *  82178 Puchheim
13 *  Germany
14 *  <rtems@embedded-brains.de>
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.com/license/LICENSE.
19 */
20
21#include <rtems/asm.h>
22#include <rtems/system.h>       
23#include <rtems/score/cpu.h>
24       
25#include <bspopts.h>
26#include <bsp/irq.h>
27#include <bsp/linker-symbols.h>
28
29        /* External symbols */
30        .extern bsp_reset
31        .extern boot_card
32        .extern bsp_start_hook_0
33        .extern bsp_start_hook_1
34
35        /* Global symbols */
36        .globl  _start
37        .globl  bsp_start_vector_table_begin
38        .globl  bsp_start_vector_table_end
39        .globl  bsp_start_vector_table_size
40        .globl  bsp_vector_table_size
41
42        .section        ".bsp_start_text", "ax"
43
44#if defined(ARM_MULTILIB_ARCH_V4)
45
46        .arm
47
48/*
49 * This is the exception vector table and the pointers to the default
50 * exceptions handlers.
51 */
52
53bsp_start_vector_table_begin:
54
55        ldr     pc, handler_addr_reset
56        ldr     pc, handler_addr_undef
57        ldr     pc, handler_addr_swi
58        ldr     pc, handler_addr_prefetch
59        ldr     pc, handler_addr_abort
60
61        /* Program signature checked by boot loader */
62        .word   0xb8a06f58
63
64        ldr     pc, handler_addr_irq
65        ldr     pc, handler_addr_fiq
66
67handler_addr_reset:
68
69#ifdef BSP_START_RESET_VECTOR
70        .word   BSP_START_RESET_VECTOR
71#else
72        .word   _start
73#endif
74
75handler_addr_undef:
76
77        .word   reset
78
79handler_addr_swi:
80
81        .word   reset
82
83handler_addr_prefetch:
84
85        .word   reset
86
87handler_addr_abort:
88
89        .word   reset
90
91handler_addr_reserved:
92
93        .word   reset
94
95handler_addr_irq:
96
97        .word   reset
98
99handler_addr_fiq:
100
101        .word   reset
102
103bsp_start_vector_table_end:
104
105/* Start entry */
106
107_start:
108
109        /*
110         * We do not save the context since we do not return to the boot
111         * loader.
112         */
113
114        /*
115         * Set SVC mode, disable interrupts and enable ARM instructions.
116         */
117        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
118        msr     cpsr, r0
119
120        /* Initialize stack pointer registers for the various modes */
121
122        /* Enter IRQ mode and set up the IRQ stack pointer */
123        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
124        msr     cpsr, r0
125        ldr     sp, =bsp_stack_irq_end
126
127        /* Enter FIQ mode and set up the FIQ stack pointer */
128        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
129        msr     cpsr, r0
130        ldr     sp, =bsp_stack_fiq_end
131
132        /* Enter ABT mode and set up the ABT stack pointer */
133        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
134        msr     cpsr, r0
135        ldr     sp, =bsp_stack_abt_end
136
137        /* Enter UND mode and set up the UND stack pointer */
138        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
139        msr     cpsr, r0
140        ldr     sp, =bsp_stack_und_end
141
142        /* Enter SVC mode and set up the SVC stack pointer */
143        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
144        msr     cpsr, r0
145        ldr     sp, =bsp_stack_svc_end
146
147        /* Stay in SVC mode */
148
149        /*
150         * Branch to start hook 0.
151         *
152         * The previous code and parts of the start hook 0 may run with an
153         * address offset.  This implies that only branches relative to the
154         * program counter are allowed.  After the start hook 0 it is assumed
155         * that the code can run at its intended position.  Thus the link
156         * register will be loaded with the absolute address.  In THUMB mode
157         * the start hook 0 must be within a 2kByte range due to the branch
158         * instruction limitation.
159         */
160
161        ldr     lr, =bsp_start_hook_0_done
162#ifdef __thumb__
163        orr     lr, #1
164#endif
165
166        SWITCH_FROM_ARM_TO_THUMB        r0
167
168        b       bsp_start_hook_0
169
170bsp_start_hook_0_done:
171
172        SWITCH_FROM_THUMB_TO_ARM
173
174        /*
175         * Initialize the exception vectors.  This includes the exceptions
176         * vectors and the pointers to the default exception handlers.
177         */
178
179        ldr     r0, =bsp_vector_table_begin
180        adr     r1, bsp_start_vector_table_begin
181        ldmia   r1!, {r2-r9}
182        stmia   r0!, {r2-r9}
183        ldmia   r1!, {r2-r9}
184        stmia   r0!, {r2-r9}
185
186        SWITCH_FROM_ARM_TO_THUMB        r0
187
188        /* Branch to start hook 1 */
189        bl      bsp_start_hook_1
190
191        /* Branch to boot card */
192        mov     r0, #0
193        bl      boot_card
194
195twiddle:
196
197        /* Branch to reset function */
198        bl      bsp_reset
199
200        b       twiddle
201
202.arm
203
204reset:
205
206        SWITCH_FROM_ARM_TO_THUMB        r0
207        b       twiddle
208
209#elif defined(ARM_MULTILIB_ARCH_V7M)
210
211        .syntax unified
212
213        .extern bsp_stack_main_end
214
215        .thumb
216
217bsp_start_vector_table_begin:
218
219        .word   bsp_stack_main_end
220        .word   _start /* Reset */
221        .word   bsp_reset /* NMI */
222        .word   bsp_reset /* Hard Fault */
223        .word   bsp_reset /* MPU Fault */
224        .word   bsp_reset /* Bus Fault */
225        .word   bsp_reset /* Usage Fault */
226        .word   bsp_reset /* Reserved */
227        .word   bsp_reset /* Reserved */
228        .word   bsp_reset /* Reserved */
229        .word   bsp_reset /* Reserved */
230        .word   bsp_reset /* SVC */
231        .word   bsp_reset /* Debug Monitor */
232        .word   bsp_reset /* Reserved */
233        .word   bsp_reset /* PendSV */
234        .word   bsp_reset /* SysTick */
235        .rept   BSP_INTERRUPT_VECTOR_MAX + 1
236        .word   bsp_reset /* IRQ */
237        .endr
238
239bsp_start_vector_table_end:
240
241        .thumb_func
242
243_start:
244
245        ldr     sp, =bsp_stack_main_end
246        ldr     lr, =bsp_start_hook_0_done + 1
247        b       bsp_start_hook_0
248
249bsp_start_hook_0_done:
250
251        bl      bsp_start_hook_1
252        movs    r0, #0
253        bl      boot_card
254
255twiddle:
256
257        bl      bsp_reset
258        b       twiddle
259
260#endif /* defined(ARM_MULTILIB_ARCH_V7M) */
261
262        .set    bsp_start_vector_table_size, bsp_start_vector_table_end - bsp_start_vector_table_begin
263        .set    bsp_vector_table_size, bsp_start_vector_table_size
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