source: rtems/c/src/lib/libbsp/arm/shared/start/start.S @ 305234f7

4.115
Last change on this file since 305234f7 was 305234f7, checked in by Sebastian Huber <sebastian.huber@…>, on 03/28/11 at 08:49:58

2011-03-29 Sebastian Huber <sebastian.huber@…>

  • shared/start/start.S: Default exception handler will result in bsp_reset().
  • shared/startup/linkcmds.base: Move unsupported sections into read-only section. Changed barrier sections.
  • Property mode set to 100644
File size: 4.5 KB
Line 
1/**
2 * @file
3 *
4 * @brief Boot and system start code.
5 */
6
7/*
8 * Copyright (c) 2008
9 * Embedded Brains GmbH
10 * Obere Lagerstr. 30
11 * D-82178 Puchheim
12 * Germany
13 * rtems@embedded-brains.de
14 *
15 * The license and distribution terms for this file may be found in the file
16 * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
17 */
18
19#include <rtems/asm.h>
20#include <rtems/system.h>       
21#include <rtems/score/cpu.h>
22       
23#include <bspopts.h>
24#include <bsp/linker-symbols.h>
25
26/* External symbols */
27
28.extern bsp_reset
29.extern boot_card
30.extern bsp_start_hook_0
31.extern bsp_start_hook_1
32
33/* Global symbols */
34
35.globl _start
36.globl bsp_start_memcpy
37
38.section ".bsp_start_text", "ax"
39
40.arm
41
42/*
43 * This is the exception vector table and the pointers to the default
44 * exceptions handlers.
45 */
46
47vector_block:
48
49        ldr     pc, handler_addr_reset
50        ldr     pc, handler_addr_undef
51        ldr     pc, handler_addr_swi
52        ldr     pc, handler_addr_prefetch
53        ldr     pc, handler_addr_abort
54
55        /* Program signature checked by boot loader */
56        .word   0xb8a06f58
57
58        ldr     pc, handler_addr_irq
59        ldr     pc, handler_addr_fiq
60
61handler_addr_reset:
62
63#ifdef BSP_START_RESET_VECTOR
64        .word   BSP_START_RESET_VECTOR
65#else
66        .word   _start
67#endif
68
69handler_addr_undef:
70
71        .word   reset
72
73handler_addr_swi:
74
75        .word   reset
76
77handler_addr_prefetch:
78
79        .word   reset
80
81handler_addr_abort:
82
83        .word   reset
84
85handler_addr_reserved:
86
87        .word   reset
88
89handler_addr_irq:
90
91        .word   reset
92
93handler_addr_fiq:
94
95        .word   reset
96
97/* Start entry */
98
99_start:
100
101        /*
102         * We do not save the context since we do not return to the boot
103         * loader.
104         */
105
106        /*
107         * Set SVC mode, disable interrupts and enable ARM instructions.
108         */
109        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
110        msr     cpsr, r0
111
112        /* Initialize stack pointer registers for the various modes */
113
114        /* Enter IRQ mode and set up the IRQ stack pointer */
115        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
116        msr     cpsr, r0
117        ldr     sp, =bsp_stack_irq_end
118
119        /* Enter FIQ mode and set up the FIQ stack pointer */
120        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
121        msr     cpsr, r0
122        ldr     sp, =bsp_stack_fiq_end
123
124        /* Enter ABT mode and set up the ABT stack pointer */
125        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
126        msr     cpsr, r0
127        ldr     sp, =bsp_stack_abt_end
128
129        /* Enter UND mode and set up the UND stack pointer */
130        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
131        msr     cpsr, r0
132        ldr     sp, =bsp_stack_und_end
133
134        /* Enter SVC mode and set up the SVC stack pointer */
135        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
136        msr     cpsr, r0
137        ldr     sp, =bsp_stack_svc_end
138
139        /* Stay in SVC mode */
140
141        /*
142         * Branch to start hook 0.
143         *
144         * The previous code and parts of the start hook 0 may run with an
145         * address offset.  This implies that only branches relative to the
146         * program counter are allowed.  After the start hook 0 it is assumed
147         * that the code can run at its intended position.  Thus the link
148         * register will be loaded with the absolute address.  In THUMB mode
149         * the start hook 0 must be within a 2kByte range due to the branch
150         * instruction limitation.
151         */
152
153        ldr     lr, =bsp_start_hook_0_done
154#ifdef __thumb__
155        orr     lr, #1
156#endif
157
158        SWITCH_FROM_ARM_TO_THUMB        r0
159
160        b       bsp_start_hook_0
161
162bsp_start_hook_0_done:
163
164        SWITCH_FROM_THUMB_TO_ARM
165
166        /*
167         * Initialize the exception vectors.  This includes the exceptions
168         * vectors and the pointers to the default exception handlers.
169         */
170
171        ldr     r0, =bsp_vector_table_begin
172        adr     r1, vector_block
173        ldmia   r1!, {r2-r9}
174        stmia   r0!, {r2-r9}
175        ldmia   r1!, {r2-r9}
176        stmia   r0!, {r2-r9}
177
178        SWITCH_FROM_ARM_TO_THUMB        r0
179
180        /* Branch to start hook 1 */
181        bl      bsp_start_hook_1
182
183        /* Branch to boot card */
184        mov     r0, #0
185        bl      boot_card
186
187twiddle:
188
189        /* Branch to reset function */
190        bl      bsp_reset
191
192        b       twiddle
193
194.arm
195
196reset:
197
198        SWITCH_FROM_ARM_TO_THUMB        r0
199        b       twiddle
200
201DEFINE_FUNCTION_ARM(bsp_start_memcpy)
202
203        /* Return if dest == src */
204        cmp     r0, r1
205#ifdef __thumb__
206        bxeq    lr
207#else
208        moveq   pc, lr
209#endif
210
211        /* Return if length is zero */
212        mov     r3, #0
213        cmp     r3, r2
214#ifdef __thumb__
215        bxeq    lr
216#else
217        moveq   pc, lr
218#endif
219
220        /* Save non-volatile registers */
221        push    {r4-r8, lr}
222
223        /* Copy worker routine to stack */
224        adr     ip, bsp_start_memcpy_begin
225        ldm     ip, {r3-r8}
226        push    {r3-r8}
227
228        /* Execute worker routine */
229        mov     r3, #0
230        mov     ip, sp
231        mov     lr, pc
232#ifdef __thumb__
233        bx      ip
234#else
235        mov     pc, ip
236#endif
237
238        /* Restore stack and non-volatile registers */
239        add     sp, sp, #24
240        pop     {r4-r8, lr}
241
242        /* Return */
243#ifdef __thumb__
244        bx      lr
245#else
246        mov     pc, lr
247#endif
248
249bsp_start_memcpy_begin:
250
251        /* Worker routine */
252        ldr     ip, [r1, r3]
253        str     ip, [r0, r3]
254        add     r3, r3, #4
255        cmp     r3, r2
256        bcc     bsp_start_memcpy_begin
257#ifdef __thumb__
258        bx      lr
259#else
260        mov     pc, lr
261#endif
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