1 | /** |
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2 | * @file |
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3 | * |
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4 | * @brief Boot and system start code. |
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5 | */ |
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6 | |
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7 | /* |
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8 | * Copyright (c) 2008 |
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9 | * Embedded Brains GmbH |
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10 | * Obere Lagerstr. 30 |
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11 | * D-82178 Puchheim |
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12 | * Germany |
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13 | * rtems@embedded-brains.de |
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14 | * |
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15 | * The license and distribution terms for this file may be found in the file |
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16 | * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE. |
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17 | */ |
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18 | |
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19 | #warning Call to boot_card has changed and needs checking. |
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20 | #warning The call is "void boot_card(const char* cmdline);" |
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21 | #warning You need to pass a NULL. |
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22 | #warning Please check and remove these warnings. |
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23 | |
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24 | #include <bsp/linker-symbols.h> |
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25 | #include <bsp/start.h> |
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26 | |
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27 | /* External symbols */ |
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28 | |
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29 | .extern bsp_reset |
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30 | .extern boot_card |
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31 | |
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32 | /* Global symbols */ |
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33 | |
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34 | .globl start |
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35 | .globl SWI_Handler |
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36 | |
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37 | /* Program Status Register definitions */ |
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38 | |
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39 | .equ PSR_MODE_USR, 0x10 |
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40 | .equ PSR_MODE_FIQ, 0x11 |
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41 | .equ PSR_MODE_IRQ, 0x12 |
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42 | .equ PSR_MODE_SVC, 0x13 |
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43 | .equ PSR_MODE_ABT, 0x17 |
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44 | .equ PSR_MODE_UNDEF, 0x1b |
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45 | .equ PSR_MODE_SYS, 0x1f |
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46 | .equ PSR_I, 0x80 |
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47 | .equ PSR_F, 0x40 |
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48 | .equ PSR_T, 0x20 |
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49 | |
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50 | .section ".entry" |
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51 | |
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52 | /* |
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53 | * This is the exception vector table and the pointers to the default |
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54 | * exceptions handlers. |
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55 | */ |
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56 | |
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57 | vector_block: |
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58 | |
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59 | ldr pc, handler_addr_reset |
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60 | ldr pc, handler_addr_undef |
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61 | ldr pc, handler_addr_swi |
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62 | ldr pc, handler_addr_prefetch |
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63 | ldr pc, handler_addr_abort |
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64 | |
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65 | /* Program signature checked by boot loader */ |
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66 | .word 0xb8a06f58 |
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67 | |
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68 | ldr pc, handler_addr_irq |
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69 | ldr pc, handler_addr_fiq |
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70 | |
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71 | handler_addr_reset: |
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72 | |
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73 | .word start |
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74 | |
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75 | handler_addr_undef: |
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76 | |
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77 | .word twiddle |
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78 | |
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79 | handler_addr_swi: |
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80 | |
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81 | .word twiddle |
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82 | |
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83 | handler_addr_prefetch: |
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84 | |
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85 | .word twiddle |
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86 | |
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87 | handler_addr_abort: |
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88 | |
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89 | .word twiddle |
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90 | |
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91 | handler_addr_reserved: |
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92 | |
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93 | .word twiddle |
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94 | |
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95 | handler_addr_irq: |
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96 | |
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97 | .word twiddle |
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98 | |
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99 | handler_addr_fiq: |
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100 | |
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101 | .word twiddle |
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102 | |
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103 | /* Start entry */ |
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104 | |
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105 | start: |
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106 | |
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107 | /* |
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108 | * We do not save the context since we do not return to the boot |
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109 | * loader. |
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110 | */ |
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111 | |
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112 | /* |
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113 | * Set SVC mode, disable interrupts and enable ARM instructions. |
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114 | */ |
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115 | mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) |
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116 | msr cpsr, r0 |
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117 | |
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118 | /* Initialize stack pointer registers for the various modes */ |
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119 | |
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120 | /* Enter IRQ mode and set up the IRQ stack pointer */ |
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121 | mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) |
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122 | msr cpsr, r0 |
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123 | ldr r1, =bsp_stack_irq_size |
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124 | ldr sp, =bsp_stack_irq_start |
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125 | add sp, sp, r1 |
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126 | |
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127 | /* Enter FIQ mode and set up the FIQ stack pointer */ |
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128 | mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) |
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129 | msr cpsr, r0 |
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130 | ldr r1, =bsp_stack_fiq_size |
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131 | ldr sp, =bsp_stack_fiq_start |
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132 | add sp, sp, r1 |
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133 | |
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134 | /* Enter ABT mode and set up the ABT stack pointer */ |
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135 | mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) |
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136 | msr cpsr, r0 |
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137 | ldr r1, =bsp_stack_abt_size |
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138 | ldr sp, =bsp_stack_abt_start |
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139 | add sp, sp, r1 |
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140 | |
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141 | /* Enter UNDEF mode and set up the UNDEF stack pointer */ |
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142 | mov r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F) |
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143 | msr cpsr, r0 |
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144 | ldr r1, =bsp_stack_undef_size |
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145 | ldr sp, =bsp_stack_undef_start |
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146 | add sp, sp, r1 |
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147 | |
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148 | /* Enter SVC mode and set up the SVC stack pointer */ |
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149 | mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) |
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150 | msr cpsr, r0 |
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151 | ldr r1, =bsp_stack_svc_size |
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152 | ldr sp, =bsp_stack_svc_start |
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153 | add sp, sp, r1 |
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154 | |
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155 | /* Stay in SVC mode */ |
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156 | |
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157 | /* Brach to start hook 0 */ |
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158 | bl bsp_start_hook_0 |
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159 | |
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160 | /* |
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161 | * Initialize the exception vectors. This includes the exceptions |
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162 | * vectors and the pointers to the default exception handlers. |
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163 | */ |
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164 | |
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165 | ldr r0, =bsp_section_vector_start |
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166 | adr r1, vector_block |
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167 | ldmia r1!, {r2-r9} |
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168 | stmia r0!, {r2-r9} |
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169 | ldmia r1!, {r2-r9} |
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170 | stmia r0!, {r2-r9} |
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171 | |
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172 | /* Brach to start hook 1 */ |
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173 | bl bsp_start_hook_1 |
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174 | |
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175 | |
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176 | /* Brach to boot card */ |
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177 | bl boot_card |
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178 | |
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179 | /* Branch to reset function */ |
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180 | bl bsp_reset |
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181 | |
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182 | /* Spin forever */ |
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183 | |
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184 | SWI_Handler: |
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185 | |
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186 | twiddle: |
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187 | |
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188 | b twiddle |
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