source: rtems/c/src/lib/libbsp/arm/shared/start/start.S @ 010e9336

4.104.115
Last change on this file since 010e9336 was 010e9336, checked in by Chris Johns <chrisj@…>, on 04/28/09 at 06:23:04

2009-04-28 Chris Johns <chrisj@…>

  • shared/start/start.S: Update for boot_card command line change.
  • Property mode set to 100644
File size: 3.6 KB
Line 
1/**
2 * @file
3 *
4 * @brief Boot and system start code.
5 */
6
7/*
8 * Copyright (c) 2008
9 * Embedded Brains GmbH
10 * Obere Lagerstr. 30
11 * D-82178 Puchheim
12 * Germany
13 * rtems@embedded-brains.de
14 *
15 * The license and distribution terms for this file may be found in the file
16 * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
17 */
18
19#warning Call to boot_card has changed and needs checking.
20#warning The call is "void boot_card(const char* cmdline);"
21#warning You need to pass a NULL.
22#warning Please check and remove these warnings.
23       
24#include <bsp/linker-symbols.h>
25#include <bsp/start.h>
26
27/* External symbols */
28
29.extern bsp_reset
30.extern boot_card
31
32/* Global symbols */
33
34.globl start
35.globl SWI_Handler
36
37/* Program Status Register definitions */
38
39.equ PSR_MODE_USR,   0x10
40.equ PSR_MODE_FIQ,   0x11
41.equ PSR_MODE_IRQ,   0x12
42.equ PSR_MODE_SVC,   0x13
43.equ PSR_MODE_ABT,   0x17
44.equ PSR_MODE_UNDEF, 0x1b
45.equ PSR_MODE_SYS,   0x1f
46.equ PSR_I,          0x80
47.equ PSR_F,          0x40
48.equ PSR_T,          0x20
49
50.section ".entry"
51
52/*
53 * This is the exception vector table and the pointers to the default
54 * exceptions handlers.
55 */
56
57vector_block:
58
59        ldr     pc, handler_addr_reset
60        ldr     pc, handler_addr_undef
61        ldr     pc, handler_addr_swi
62        ldr     pc, handler_addr_prefetch
63        ldr     pc, handler_addr_abort
64
65        /* Program signature checked by boot loader */
66        .word   0xb8a06f58
67
68        ldr     pc, handler_addr_irq
69        ldr     pc, handler_addr_fiq
70
71handler_addr_reset:
72
73        .word   start
74
75handler_addr_undef:
76
77        .word   twiddle
78
79handler_addr_swi:
80
81        .word   twiddle
82
83handler_addr_prefetch:
84
85        .word   twiddle
86
87handler_addr_abort:
88
89        .word   twiddle
90
91handler_addr_reserved:
92
93        .word   twiddle
94
95handler_addr_irq:
96
97        .word   twiddle
98
99handler_addr_fiq:
100
101        .word   twiddle
102
103/* Start entry */
104
105start:
106
107        /*
108         * We do not save the context since we do not return to the boot
109         * loader.
110         */
111
112        /*
113         * Set SVC mode, disable interrupts and enable ARM instructions.
114         */
115        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
116        msr     cpsr, r0
117
118        /* Initialize stack pointer registers for the various modes */
119
120        /* Enter IRQ mode and set up the IRQ stack pointer */
121        mov     r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)
122        msr     cpsr, r0
123        ldr     r1, =bsp_stack_irq_size
124        ldr     sp, =bsp_stack_irq_start
125        add     sp, sp, r1
126
127        /* Enter FIQ mode and set up the FIQ stack pointer */
128        mov     r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)
129        msr     cpsr, r0
130        ldr     r1, =bsp_stack_fiq_size
131        ldr     sp, =bsp_stack_fiq_start
132        add     sp, sp, r1
133
134        /* Enter ABT mode and set up the ABT stack pointer */
135        mov     r0, #(PSR_MODE_ABT | PSR_I | PSR_F)
136        msr     cpsr, r0
137        ldr     r1, =bsp_stack_abt_size
138        ldr     sp, =bsp_stack_abt_start
139        add     sp, sp, r1
140
141        /* Enter UNDEF mode and set up the UNDEF stack pointer */
142        mov     r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F)
143        msr     cpsr, r0
144        ldr     r1, =bsp_stack_undef_size
145        ldr     sp, =bsp_stack_undef_start
146        add     sp, sp, r1
147
148        /* Enter SVC mode and set up the SVC stack pointer */
149        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
150        msr     cpsr, r0
151        ldr     r1, =bsp_stack_svc_size
152        ldr     sp, =bsp_stack_svc_start
153        add     sp, sp, r1
154
155        /* Stay in SVC mode */
156
157        /* Brach to start hook 0 */
158        bl      bsp_start_hook_0
159
160        /*
161         * Initialize the exception vectors.  This includes the exceptions
162         * vectors and the pointers to the default exception handlers.
163         */
164
165        ldr     r0, =bsp_section_vector_start
166        adr     r1, vector_block
167        ldmia   r1!, {r2-r9}
168        stmia   r0!, {r2-r9}
169        ldmia   r1!, {r2-r9}
170        stmia   r0!, {r2-r9}
171
172        /* Brach to start hook 1 */
173        bl      bsp_start_hook_1
174
175
176        /* Brach to boot card */
177        bl      boot_card
178
179        /* Branch to reset function */
180        bl      bsp_reset
181
182        /* Spin forever */
183
184SWI_Handler:
185
186twiddle:
187
188        b       twiddle
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