[39c8fdb] | 1 | /** |
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| 2 | * @file |
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| 3 | * |
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[7a6f8d0] | 4 | * @ingroup lpc_eth |
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[39c8fdb] | 5 | * |
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| 6 | * @brief Ethernet driver. |
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| 7 | */ |
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| 8 | |
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| 9 | /* |
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| 10 | * Copyright (c) 2009 |
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| 11 | * embedded brains GmbH |
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| 12 | * Obere Lagerstr. 30 |
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| 13 | * D-82178 Puchheim |
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| 14 | * Germany |
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| 15 | * <rtems@embedded-brains.de> |
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| 16 | * |
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| 17 | * The license and distribution terms for this file may be |
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| 18 | * found in the file LICENSE in this distribution or at |
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| 19 | * http://www.rtems.com/license/LICENSE. |
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| 20 | */ |
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| 21 | |
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| 22 | #define __INSIDE_RTEMS_BSD_TCPIP_STACK__ 1 |
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| 23 | #define __BSD_VISIBLE 1 |
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| 24 | |
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| 25 | #include <errno.h> |
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| 26 | #include <inttypes.h> |
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| 27 | #include <stdlib.h> |
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| 28 | #include <stdio.h> |
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| 29 | #include <string.h> |
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| 30 | |
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| 31 | #include <rtems.h> |
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| 32 | #include <rtems/rtems_bsdnet.h> |
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| 33 | #include <rtems/rtems_mii_ioctl.h> |
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| 34 | |
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| 35 | #include <sys/param.h> |
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| 36 | #include <sys/socket.h> |
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| 37 | #include <sys/sockio.h> |
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| 38 | #include <sys/mbuf.h> |
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| 39 | |
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| 40 | #include <net/if.h> |
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| 41 | #include <net/if_arp.h> |
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| 42 | #include <netinet/in.h> |
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| 43 | #include <netinet/if_ether.h> |
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| 44 | #include <netinet/in_systm.h> |
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| 45 | #include <netinet/ip.h> |
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| 46 | |
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| 47 | #include <bsp.h> |
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| 48 | #include <bsp/irq.h> |
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| 49 | #include <bsp/lpc-ethernet-config.h> |
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| 50 | |
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| 51 | #include <rtems/status-checks.h> |
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| 52 | |
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| 53 | #if MCLBYTES > (2 * 1024) |
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| 54 | #error "MCLBYTES to large" |
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| 55 | #endif |
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| 56 | |
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| 57 | #ifdef LPC_ETH_CONFIG_USE_TRANSMIT_DMA |
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| 58 | #define LPC_ETH_CONFIG_TX_BUF_SIZE sizeof(struct mbuf *) |
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| 59 | #else |
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| 60 | #define LPC_ETH_CONFIG_TX_BUF_SIZE 1518U |
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| 61 | #endif |
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| 62 | |
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| 63 | typedef struct { |
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| 64 | uint32_t start; |
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| 65 | uint32_t control; |
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| 66 | } lpc_eth_transfer_descriptor; |
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| 67 | |
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| 68 | typedef struct { |
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| 69 | uint32_t info; |
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| 70 | uint32_t hash_crc; |
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| 71 | } lpc_eth_receive_status; |
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| 72 | |
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| 73 | typedef struct { |
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| 74 | uint32_t mac1; |
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| 75 | uint32_t mac2; |
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| 76 | uint32_t ipgt; |
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| 77 | uint32_t ipgr; |
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| 78 | uint32_t clrt; |
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| 79 | uint32_t maxf; |
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| 80 | uint32_t supp; |
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| 81 | uint32_t test; |
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| 82 | uint32_t mcfg; |
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| 83 | uint32_t mcmd; |
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| 84 | uint32_t madr; |
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| 85 | uint32_t mwtd; |
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| 86 | uint32_t mrdd; |
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| 87 | uint32_t mind; |
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| 88 | uint32_t reserved_0 [2]; |
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| 89 | uint32_t sa0; |
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| 90 | uint32_t sa1; |
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| 91 | uint32_t sa2; |
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| 92 | uint32_t reserved_1 [45]; |
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| 93 | uint32_t command; |
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| 94 | uint32_t status; |
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| 95 | uint32_t rxdescriptor; |
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| 96 | uint32_t rxstatus; |
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| 97 | uint32_t rxdescriptornum; |
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| 98 | uint32_t rxproduceindex; |
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| 99 | uint32_t rxconsumeindex; |
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| 100 | uint32_t txdescriptor; |
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| 101 | uint32_t txstatus; |
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| 102 | uint32_t txdescriptornum; |
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| 103 | uint32_t txproduceindex; |
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| 104 | uint32_t txconsumeindex; |
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| 105 | uint32_t reserved_2 [10]; |
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| 106 | uint32_t tsv0; |
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| 107 | uint32_t tsv1; |
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| 108 | uint32_t rsv; |
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| 109 | uint32_t reserved_3 [3]; |
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| 110 | uint32_t flowcontrolcnt; |
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| 111 | uint32_t flowcontrolsts; |
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| 112 | uint32_t reserved_4 [34]; |
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| 113 | uint32_t rxfilterctrl; |
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| 114 | uint32_t rxfilterwolsts; |
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| 115 | uint32_t rxfilterwolclr; |
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| 116 | uint32_t reserved_5 [1]; |
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| 117 | uint32_t hashfilterl; |
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| 118 | uint32_t hashfilterh; |
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| 119 | uint32_t reserved_6 [882]; |
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| 120 | uint32_t intstatus; |
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| 121 | uint32_t intenable; |
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| 122 | uint32_t intclear; |
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| 123 | uint32_t intset; |
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| 124 | uint32_t reserved_7 [1]; |
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| 125 | uint32_t powerdown; |
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| 126 | } lpc_eth_controller; |
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| 127 | |
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| 128 | static volatile lpc_eth_controller *const lpc_eth = |
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| 129 | (volatile lpc_eth_controller *) LPC_ETH_CONFIG_REG_BASE; |
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| 130 | |
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| 131 | /* ETH_RX_CTRL */ |
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| 132 | |
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| 133 | #define ETH_RX_CTRL_SIZE_MASK 0x000007ffU |
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| 134 | #define ETH_RX_CTRL_INTERRUPT 0x80000000U |
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| 135 | |
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| 136 | /* ETH_RX_STAT */ |
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| 137 | |
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| 138 | #define ETH_RX_STAT_RXSIZE_MASK 0x000007ffU |
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| 139 | #define ETH_RX_STAT_BYTES 0x00000100U |
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| 140 | #define ETH_RX_STAT_CONTROL_FRAME 0x00040000U |
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| 141 | #define ETH_RX_STAT_VLAN 0x00080000U |
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| 142 | #define ETH_RX_STAT_FAIL_FILTER 0x00100000U |
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| 143 | #define ETH_RX_STAT_MULTICAST 0x00200000U |
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| 144 | #define ETH_RX_STAT_BROADCAST 0x00400000U |
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| 145 | #define ETH_RX_STAT_CRC_ERROR 0x00800000U |
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| 146 | #define ETH_RX_STAT_SYMBOL_ERROR 0x01000000U |
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| 147 | #define ETH_RX_STAT_LENGTH_ERROR 0x02000000U |
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| 148 | #define ETH_RX_STAT_RANGE_ERROR 0x04000000U |
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| 149 | #define ETH_RX_STAT_ALIGNMENT_ERROR 0x08000000U |
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| 150 | #define ETH_RX_STAT_OVERRUN 0x10000000U |
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| 151 | #define ETH_RX_STAT_NO_DESCRIPTOR 0x20000000U |
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| 152 | #define ETH_RX_STAT_LAST_FLAG 0x40000000U |
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| 153 | #define ETH_RX_STAT_ERROR 0x80000000U |
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| 154 | |
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| 155 | /* ETH_TX_CTRL */ |
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| 156 | |
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| 157 | #define ETH_TX_CTRL_SIZE_MASK 0x7ffU |
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| 158 | #define ETH_TX_CTRL_SIZE_SHIFT 0 |
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| 159 | #define ETH_TX_CTRL_OVERRIDE 0x04000000U |
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| 160 | #define ETH_TX_CTRL_HUGE 0x08000000U |
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| 161 | #define ETH_TX_CTRL_PAD 0x10000000U |
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| 162 | #define ETH_TX_CTRL_CRC 0x20000000U |
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| 163 | #define ETH_TX_CTRL_LAST 0x40000000U |
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| 164 | #define ETH_TX_CTRL_INTERRUPT 0x80000000U |
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| 165 | |
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| 166 | /* ETH_TX_STAT */ |
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| 167 | |
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| 168 | #define ETH_TX_STAT_COLLISION_COUNT_MASK 0x01e00000U |
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| 169 | #define ETH_TX_STAT_DEFER 0x02000000U |
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| 170 | #define ETH_TX_STAT_EXCESSIVE_DEFER 0x04000000U |
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| 171 | #define ETH_TX_STAT_EXCESSIVE_COLLISION 0x08000000U |
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| 172 | #define ETH_TX_STAT_LATE_COLLISION 0x10000000U |
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| 173 | #define ETH_TX_STAT_UNDERRUN 0x20000000U |
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| 174 | #define ETH_TX_STAT_NO_DESCRIPTOR 0x40000000U |
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| 175 | #define ETH_TX_STAT_ERROR 0x80000000U |
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| 176 | |
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| 177 | /* ETH_INT */ |
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| 178 | |
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| 179 | #define ETH_INT_RX_OVERRUN 0x00000001U |
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| 180 | #define ETH_INT_RX_ERROR 0x00000002U |
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| 181 | #define ETH_INT_RX_FINISHED 0x00000004U |
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| 182 | #define ETH_INT_RX_DONE 0x00000008U |
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| 183 | #define ETH_INT_TX_UNDERRUN 0x00000010U |
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| 184 | #define ETH_INT_TX_ERROR 0x00000020U |
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| 185 | #define ETH_INT_TX_FINISHED 0x00000040U |
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| 186 | #define ETH_INT_TX_DONE 0x00000080U |
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| 187 | #define ETH_INT_SOFT 0x00001000U |
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| 188 | #define ETH_INT_WAKEUP 0x00002000U |
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| 189 | |
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| 190 | /* ETH_RX_FIL_CTRL */ |
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| 191 | |
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| 192 | #define ETH_RX_FIL_CTRL_ACCEPT_UNICAST 0x00000001U |
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| 193 | #define ETH_RX_FIL_CTRL_ACCEPT_BROADCAST 0x00000002U |
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| 194 | #define ETH_RX_FIL_CTRL_ACCEPT_MULTICAST 0x00000004U |
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| 195 | #define ETH_RX_FIL_CTRL_ACCEPT_UNICAST_HASH 0x00000008U |
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| 196 | #define ETH_RX_FIL_CTRL_ACCEPT_MULTICAST_HASH 0x00000010U |
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| 197 | #define ETH_RX_FIL_CTRL_ACCEPT_PERFECT 0x00000020U |
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| 198 | #define ETH_RX_FIL_CTRL_MAGIC_PACKET_WOL 0x00001000U |
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| 199 | #define ETH_RX_FIL_CTRL_RX_FILTER_WOL 0x00002000U |
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| 200 | |
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| 201 | /* ETH_CMD */ |
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| 202 | |
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| 203 | #define ETH_CMD_RX_ENABLE 0x00000001U |
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| 204 | #define ETH_CMD_TX_ENABLE 0x00000002U |
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| 205 | #define ETH_CMD_REG_RESET 0x00000008U |
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| 206 | #define ETH_CMD_TX_RESET 0x00000010U |
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| 207 | #define ETH_CMD_RX_RESET 0x00000020U |
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| 208 | #define ETH_CMD_PASS_RUNT_FRAME 0x00000040U |
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| 209 | #define ETH_CMD_PASS_RX_FILTER 0X00000080U |
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| 210 | #define ETH_CMD_TX_FLOW_CONTROL 0x00000100U |
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| 211 | #define ETH_CMD_RMII 0x00000200U |
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| 212 | #define ETH_CMD_FULL_DUPLEX 0x00000400U |
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| 213 | |
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| 214 | /* ETH_STAT */ |
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| 215 | |
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| 216 | #define ETH_STAT_RX_ACTIVE 0x00000001U |
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| 217 | #define ETH_STAT_TX_ACTIVE 0x00000002U |
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| 218 | |
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| 219 | /* Events */ |
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| 220 | |
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| 221 | #define LPC_ETH_EVENT_INITIALIZE RTEMS_EVENT_1 |
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| 222 | |
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| 223 | #define LPC_ETH_EVENT_START RTEMS_EVENT_2 |
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| 224 | |
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| 225 | #define LPC_ETH_EVENT_INTERRUPT RTEMS_EVENT_3 |
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| 226 | |
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| 227 | /* Status */ |
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| 228 | |
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| 229 | #define LPC_ETH_INTERRUPT_RECEIVE \ |
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| 230 | (ETH_INT_RX_ERROR | ETH_INT_RX_FINISHED | ETH_INT_RX_DONE) |
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| 231 | |
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| 232 | #define LPC_ETH_INTERRUPT_TRANSMIT \ |
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| 233 | (ETH_INT_TX_DONE | ETH_INT_TX_FINISHED | ETH_INT_TX_ERROR) |
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| 234 | |
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| 235 | #define LPC_ETH_RX_STAT_ERRORS \ |
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| 236 | (ETH_RX_STAT_CRC_ERROR \ |
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| 237 | | ETH_RX_STAT_SYMBOL_ERROR \ |
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| 238 | | ETH_RX_STAT_LENGTH_ERROR \ |
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| 239 | | ETH_RX_STAT_ALIGNMENT_ERROR \ |
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| 240 | | ETH_RX_STAT_OVERRUN \ |
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| 241 | | ETH_RX_STAT_NO_DESCRIPTOR) |
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| 242 | |
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| 243 | #define LPC_ETH_LAST_FRAGMENT_FLAGS \ |
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| 244 | (ETH_TX_CTRL_OVERRIDE \ |
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| 245 | | ETH_TX_CTRL_PAD \ |
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| 246 | | ETH_TX_CTRL_CRC \ |
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| 247 | | ETH_TX_CTRL_INTERRUPT \ |
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| 248 | | ETH_TX_CTRL_LAST) |
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| 249 | |
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| 250 | /* Debug */ |
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| 251 | |
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| 252 | #ifdef DEBUG |
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| 253 | #define LPC_ETH_PRINTF(...) printf(__VA_ARGS__) |
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| 254 | #define LPC_ETH_PRINTK(...) printk(__VA_ARGS__) |
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| 255 | #else |
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| 256 | #define LPC_ETH_PRINTF(...) |
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| 257 | #define LPC_ETH_PRINTK(...) |
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| 258 | #endif |
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| 259 | |
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| 260 | typedef enum { |
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| 261 | LPC_ETH_NOT_INITIALIZED, |
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| 262 | LPC_ETH_INITIALIZED, |
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| 263 | LPC_ETH_STARTED, |
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| 264 | LPC_ETH_RUNNING |
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| 265 | } lpc_eth_state; |
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| 266 | |
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| 267 | typedef struct { |
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| 268 | struct arpcom arpcom; |
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| 269 | struct rtems_mdio_info mdio_info; |
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| 270 | lpc_eth_state state; |
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| 271 | rtems_id receive_task; |
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| 272 | rtems_id transmit_task; |
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| 273 | unsigned rx_unit_count; |
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| 274 | unsigned tx_unit_count; |
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| 275 | volatile lpc_eth_transfer_descriptor *rx_desc_table; |
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| 276 | volatile lpc_eth_receive_status *rx_status_table; |
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| 277 | struct mbuf **rx_mbuf_table; |
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| 278 | volatile lpc_eth_transfer_descriptor *tx_desc_table; |
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| 279 | volatile uint32_t *tx_status_table; |
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| 280 | void *tx_buf_table; |
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| 281 | unsigned received_frames; |
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| 282 | unsigned receive_interrupts; |
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| 283 | unsigned transmitted_frames; |
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| 284 | unsigned transmit_interrupts; |
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| 285 | unsigned receive_overrun_errors; |
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| 286 | unsigned receive_fragment_errors; |
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| 287 | unsigned receive_crc_errors; |
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| 288 | unsigned receive_symbol_errors; |
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| 289 | unsigned receive_length_errors; |
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| 290 | unsigned receive_alignment_errors; |
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| 291 | unsigned receive_no_descriptor_errors; |
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| 292 | unsigned receive_fatal_errors; |
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| 293 | unsigned transmit_underrun_errors; |
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| 294 | unsigned transmit_late_collision_errors; |
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| 295 | unsigned transmit_excessive_collision_errors; |
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| 296 | unsigned transmit_excessive_defer_errors; |
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| 297 | unsigned transmit_no_descriptor_errors; |
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| 298 | unsigned transmit_overflow_errors; |
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| 299 | unsigned transmit_fatal_errors; |
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| 300 | } lpc_eth_driver_entry; |
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| 301 | |
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| 302 | static lpc_eth_driver_entry lpc_eth_driver_data = { |
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| 303 | .state = LPC_ETH_NOT_INITIALIZED, |
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| 304 | .receive_task = RTEMS_ID_NONE, |
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| 305 | .transmit_task = RTEMS_ID_NONE |
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| 306 | }; |
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| 307 | |
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| 308 | static inline uint32_t lpc_eth_increment( |
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| 309 | uint32_t value, |
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| 310 | uint32_t cycle |
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| 311 | ) |
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| 312 | { |
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| 313 | if (value < cycle) { |
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| 314 | return ++value; |
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| 315 | } else { |
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| 316 | return 0; |
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| 317 | } |
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| 318 | } |
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| 319 | |
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| 320 | static void lpc_eth_enable_promiscous_mode(bool enable) |
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| 321 | { |
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| 322 | if (enable) { |
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| 323 | lpc_eth->rxfilterctrl = ETH_RX_FIL_CTRL_ACCEPT_PERFECT |
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| 324 | | ETH_RX_FIL_CTRL_ACCEPT_UNICAST |
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| 325 | | ETH_RX_FIL_CTRL_ACCEPT_MULTICAST |
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| 326 | | ETH_RX_FIL_CTRL_ACCEPT_BROADCAST; |
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| 327 | } else { |
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| 328 | lpc_eth->rxfilterctrl = ETH_RX_FIL_CTRL_ACCEPT_PERFECT |
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| 329 | | ETH_RX_FIL_CTRL_ACCEPT_BROADCAST; |
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| 330 | } |
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| 331 | } |
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| 332 | |
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| 333 | static void lpc_eth_interrupt_handler(void *arg) |
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| 334 | { |
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| 335 | lpc_eth_driver_entry *e = (lpc_eth_driver_entry *) arg; |
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| 336 | rtems_event_set re = 0; |
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| 337 | rtems_event_set te = 0; |
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| 338 | uint32_t ie = 0; |
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| 339 | |
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| 340 | /* Get interrupt status */ |
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| 341 | uint32_t im = lpc_eth->intenable; |
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| 342 | uint32_t is = lpc_eth->intstatus & im; |
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| 343 | |
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| 344 | /* Check receive interrupts */ |
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| 345 | if ((is & ETH_INT_RX_OVERRUN) != 0) { |
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| 346 | re = LPC_ETH_EVENT_INITIALIZE; |
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| 347 | ++e->receive_fatal_errors; |
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| 348 | } else if ((is & LPC_ETH_INTERRUPT_RECEIVE) != 0) { |
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| 349 | re = LPC_ETH_EVENT_INTERRUPT; |
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| 350 | ie |= LPC_ETH_INTERRUPT_RECEIVE; |
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| 351 | } |
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| 352 | |
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| 353 | /* Send events to receive task */ |
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| 354 | if (re != 0) { |
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| 355 | ++e->receive_interrupts; |
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| 356 | (void) rtems_event_send(e->receive_task, re); |
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| 357 | } |
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| 358 | |
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| 359 | /* Check transmit interrupts */ |
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| 360 | if ((is & ETH_INT_TX_UNDERRUN) != 0) { |
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| 361 | te = LPC_ETH_EVENT_INITIALIZE; |
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| 362 | ++e->transmit_fatal_errors; |
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| 363 | } else if ((is & LPC_ETH_INTERRUPT_TRANSMIT) != 0) { |
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| 364 | te = LPC_ETH_EVENT_INTERRUPT; |
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| 365 | ie |= LPC_ETH_INTERRUPT_TRANSMIT; |
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| 366 | } |
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| 367 | |
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| 368 | /* Send events to transmit task */ |
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| 369 | if (te != 0) { |
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| 370 | ++e->transmit_interrupts; |
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| 371 | (void) rtems_event_send(e->transmit_task, te); |
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| 372 | } |
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| 373 | |
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| 374 | LPC_ETH_PRINTK("interrupt: rx = 0x%08x, tx = 0x%08x\n", re, te); |
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| 375 | |
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| 376 | /* Update interrupt mask */ |
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| 377 | lpc_eth->intenable = im & ~ie; |
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| 378 | |
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| 379 | /* Clear interrupts */ |
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| 380 | lpc_eth->intclear = is; |
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| 381 | } |
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| 382 | |
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| 383 | static void lpc_eth_enable_receive_interrupts(void) |
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| 384 | { |
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| 385 | rtems_interrupt_level level; |
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| 386 | |
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| 387 | rtems_interrupt_disable(level); |
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| 388 | lpc_eth->intenable |= LPC_ETH_INTERRUPT_RECEIVE; |
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| 389 | rtems_interrupt_enable(level); |
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| 390 | } |
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| 391 | |
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| 392 | static void lpc_eth_disable_receive_interrupts(void) |
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| 393 | { |
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| 394 | rtems_interrupt_level level; |
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| 395 | |
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| 396 | rtems_interrupt_disable(level); |
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| 397 | lpc_eth->intenable &= ~LPC_ETH_INTERRUPT_RECEIVE; |
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| 398 | rtems_interrupt_enable(level); |
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| 399 | } |
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| 400 | |
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| 401 | static void lpc_eth_enable_transmit_interrupts(void) |
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| 402 | { |
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| 403 | rtems_interrupt_level level; |
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| 404 | |
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| 405 | rtems_interrupt_disable(level); |
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| 406 | lpc_eth->intenable |= LPC_ETH_INTERRUPT_TRANSMIT; |
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| 407 | rtems_interrupt_enable(level); |
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| 408 | } |
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| 409 | |
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| 410 | static void lpc_eth_disable_transmit_interrupts(void) |
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| 411 | { |
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| 412 | rtems_interrupt_level level; |
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| 413 | |
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| 414 | rtems_interrupt_disable(level); |
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| 415 | lpc_eth->intenable &= ~LPC_ETH_INTERRUPT_TRANSMIT; |
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| 416 | rtems_interrupt_enable(level); |
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| 417 | } |
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| 418 | |
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| 419 | #define LPC_ETH_RX_DATA_OFFSET 2 |
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| 420 | |
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| 421 | static struct mbuf *lpc_eth_new_mbuf(struct ifnet *ifp, bool wait) |
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| 422 | { |
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| 423 | struct mbuf *m = NULL; |
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| 424 | int mw = wait ? M_WAIT : M_DONTWAIT; |
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| 425 | |
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| 426 | MGETHDR(m, mw, MT_DATA); |
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| 427 | if (m != NULL) { |
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| 428 | MCLGET(m, mw); |
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| 429 | if ((m->m_flags & M_EXT) != 0) { |
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| 430 | /* Set receive interface */ |
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| 431 | m->m_pkthdr.rcvif = ifp; |
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| 432 | |
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| 433 | /* Adjust by two bytes for proper IP header alignment */ |
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| 434 | m->m_data = mtod(m, char *) + LPC_ETH_RX_DATA_OFFSET; |
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| 435 | |
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| 436 | return m; |
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| 437 | } else { |
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| 438 | m_free(m); |
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| 439 | } |
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| 440 | } |
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| 441 | |
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| 442 | return NULL; |
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| 443 | } |
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| 444 | |
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| 445 | static bool lpc_eth_add_new_mbuf( |
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| 446 | struct ifnet *ifp, |
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| 447 | volatile lpc_eth_transfer_descriptor *desc, |
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| 448 | struct mbuf **mbufs, |
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| 449 | uint32_t i, |
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| 450 | bool wait |
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| 451 | ) |
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| 452 | { |
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| 453 | /* New mbuf */ |
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| 454 | struct mbuf *m = lpc_eth_new_mbuf(ifp, wait); |
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| 455 | |
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| 456 | /* Check mbuf */ |
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| 457 | if (m != NULL) { |
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| 458 | /* Cache invalidate */ |
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| 459 | rtems_cache_invalidate_multiple_data_lines( |
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| 460 | mtod(m, void *), |
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| 461 | MCLBYTES - LPC_ETH_RX_DATA_OFFSET |
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| 462 | ); |
---|
| 463 | |
---|
| 464 | /* Add mbuf to queue */ |
---|
| 465 | desc [i].start = mtod(m, uint32_t); |
---|
| 466 | desc [i].control = (MCLBYTES - LPC_ETH_RX_DATA_OFFSET - 1) |
---|
| 467 | | ETH_RX_CTRL_INTERRUPT; |
---|
| 468 | |
---|
| 469 | /* Cache flush of descriptor */ |
---|
| 470 | rtems_cache_flush_multiple_data_lines(&desc [i], sizeof(desc [0])); |
---|
| 471 | |
---|
| 472 | /* Add mbuf to table */ |
---|
| 473 | mbufs [i] = m; |
---|
| 474 | |
---|
| 475 | return true; |
---|
| 476 | } else { |
---|
| 477 | return false; |
---|
| 478 | } |
---|
| 479 | } |
---|
| 480 | |
---|
| 481 | static void lpc_eth_receive_task(void *arg) |
---|
| 482 | { |
---|
| 483 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
---|
| 484 | rtems_event_set events = 0; |
---|
| 485 | lpc_eth_driver_entry *const e = (lpc_eth_driver_entry *) arg; |
---|
| 486 | struct ifnet *const ifp = &e->arpcom.ac_if; |
---|
| 487 | volatile lpc_eth_transfer_descriptor *const desc = e->rx_desc_table; |
---|
| 488 | volatile lpc_eth_receive_status *const status = e->rx_status_table; |
---|
| 489 | struct mbuf **const mbufs = e->rx_mbuf_table; |
---|
| 490 | uint32_t const index_max = e->rx_unit_count - 1; |
---|
| 491 | uint32_t produce_index = 0; |
---|
| 492 | uint32_t consume_index = 0; |
---|
| 493 | uint32_t receive_index = 0; |
---|
| 494 | |
---|
| 495 | LPC_ETH_PRINTF("%s\n", __func__); |
---|
| 496 | |
---|
| 497 | /* Main event loop */ |
---|
| 498 | while (true) { |
---|
| 499 | bool wait_for_mbuf = false; |
---|
| 500 | |
---|
| 501 | /* Wait for events */ |
---|
| 502 | sc = rtems_bsdnet_event_receive( |
---|
| 503 | LPC_ETH_EVENT_INITIALIZE | LPC_ETH_EVENT_INTERRUPT, |
---|
| 504 | RTEMS_EVENT_ANY | RTEMS_WAIT, |
---|
| 505 | RTEMS_NO_TIMEOUT, |
---|
| 506 | &events |
---|
| 507 | ); |
---|
| 508 | RTEMS_CLEANUP_SC(sc, cleanup, "wait for events"); |
---|
| 509 | |
---|
| 510 | LPC_ETH_PRINTF("rx: wake up: 0x%08" PRIx32 "\n", events); |
---|
| 511 | |
---|
| 512 | /* Initialize receiver? */ |
---|
| 513 | if ((events & LPC_ETH_EVENT_INITIALIZE) != 0) { |
---|
| 514 | /* Disable receive interrupts */ |
---|
| 515 | lpc_eth_disable_receive_interrupts(); |
---|
| 516 | |
---|
| 517 | /* Disable receiver */ |
---|
| 518 | lpc_eth->command &= ~ETH_CMD_RX_ENABLE; |
---|
| 519 | |
---|
| 520 | /* Wait for inactive status */ |
---|
| 521 | while ((lpc_eth->status & ETH_STAT_RX_ACTIVE) != 0) { |
---|
| 522 | /* Wait */ |
---|
| 523 | } |
---|
| 524 | |
---|
| 525 | /* Reset */ |
---|
| 526 | lpc_eth->command |= ETH_CMD_RX_RESET; |
---|
| 527 | |
---|
| 528 | /* Clear receive interrupts */ |
---|
| 529 | lpc_eth->intclear = LPC_ETH_INTERRUPT_RECEIVE; |
---|
| 530 | |
---|
| 531 | /* Move existing mbufs to the front */ |
---|
| 532 | consume_index = 0; |
---|
| 533 | for (produce_index = 0; produce_index <= index_max; ++produce_index) { |
---|
| 534 | if (mbufs [produce_index] != NULL) { |
---|
| 535 | mbufs [consume_index] = mbufs [produce_index]; |
---|
| 536 | ++consume_index; |
---|
| 537 | } |
---|
| 538 | } |
---|
| 539 | |
---|
| 540 | /* Fill receive queue */ |
---|
| 541 | for ( |
---|
| 542 | produce_index = consume_index; |
---|
| 543 | produce_index <= index_max; |
---|
| 544 | ++produce_index |
---|
| 545 | ) { |
---|
| 546 | lpc_eth_add_new_mbuf(ifp, desc, mbufs, produce_index, true); |
---|
| 547 | } |
---|
| 548 | |
---|
| 549 | /* Receive descriptor table */ |
---|
| 550 | lpc_eth->rxdescriptornum = index_max; |
---|
| 551 | lpc_eth->rxdescriptor = (uint32_t) desc; |
---|
| 552 | lpc_eth->rxstatus = (uint32_t) status; |
---|
| 553 | |
---|
| 554 | /* Initialize indices */ |
---|
| 555 | produce_index = lpc_eth->rxproduceindex; |
---|
| 556 | consume_index = lpc_eth->rxconsumeindex; |
---|
| 557 | receive_index = consume_index; |
---|
| 558 | |
---|
| 559 | /* Enable receiver */ |
---|
| 560 | lpc_eth->command |= ETH_CMD_RX_ENABLE; |
---|
| 561 | |
---|
| 562 | /* Enable receive interrupts */ |
---|
| 563 | lpc_eth_enable_receive_interrupts(); |
---|
| 564 | |
---|
| 565 | /* Wait for events */ |
---|
| 566 | continue; |
---|
| 567 | } |
---|
| 568 | |
---|
| 569 | while (true) { |
---|
| 570 | /* Clear receive interrupt status */ |
---|
| 571 | lpc_eth->intclear = LPC_ETH_INTERRUPT_RECEIVE; |
---|
| 572 | |
---|
| 573 | /* Get current produce index */ |
---|
| 574 | produce_index = lpc_eth->rxproduceindex; |
---|
| 575 | |
---|
| 576 | if (receive_index != produce_index) { |
---|
| 577 | uint32_t stat = 0; |
---|
| 578 | |
---|
| 579 | /* Fragment mbuf */ |
---|
| 580 | struct mbuf *m = mbufs [receive_index]; |
---|
| 581 | |
---|
| 582 | /* Fragment status */ |
---|
| 583 | rtems_cache_invalidate_multiple_data_lines( |
---|
| 584 | &status [receive_index], |
---|
| 585 | sizeof(status [0]) |
---|
| 586 | ); |
---|
| 587 | stat = status [receive_index].info; |
---|
| 588 | |
---|
| 589 | /* Remove mbuf from table */ |
---|
| 590 | mbufs [receive_index] = NULL; |
---|
| 591 | |
---|
| 592 | if ( |
---|
| 593 | (stat & ETH_RX_STAT_LAST_FLAG) != 0 |
---|
| 594 | && (stat & LPC_ETH_RX_STAT_ERRORS) == 0 |
---|
| 595 | ) { |
---|
| 596 | /* Ethernet header */ |
---|
| 597 | struct ether_header *eh = mtod(m, struct ether_header *); |
---|
| 598 | |
---|
| 599 | /* Discard Ethernet header and CRC */ |
---|
| 600 | int sz = (int) (stat & ETH_RX_STAT_RXSIZE_MASK) + 1 |
---|
| 601 | - ETHER_HDR_LEN - ETHER_CRC_LEN; |
---|
| 602 | |
---|
| 603 | /* Update mbuf */ |
---|
| 604 | m->m_len = sz; |
---|
| 605 | m->m_pkthdr.len = sz; |
---|
| 606 | m->m_data = mtod(m, char *) + ETHER_HDR_LEN; |
---|
| 607 | |
---|
| 608 | LPC_ETH_PRINTF("rx: %02" PRIu32 ": %u\n", receive_index, sz); |
---|
| 609 | |
---|
| 610 | /* Hand over */ |
---|
| 611 | ether_input(ifp, eh, m); |
---|
| 612 | |
---|
| 613 | /* Increment received frames counter */ |
---|
| 614 | ++e->received_frames; |
---|
| 615 | } else { |
---|
| 616 | /* Release mbuf */ |
---|
| 617 | m_free(m); |
---|
| 618 | |
---|
| 619 | /* Update error counters */ |
---|
| 620 | if ((stat & ETH_RX_STAT_OVERRUN) != 0) { |
---|
| 621 | ++e->receive_overrun_errors; |
---|
| 622 | } |
---|
| 623 | if ((stat & ETH_RX_STAT_LAST_FLAG) == 0) { |
---|
| 624 | ++e->receive_fragment_errors; |
---|
| 625 | } |
---|
| 626 | if ((stat & ETH_RX_STAT_CRC_ERROR) != 0) { |
---|
| 627 | ++e->receive_crc_errors; |
---|
| 628 | } |
---|
| 629 | if ((stat & ETH_RX_STAT_SYMBOL_ERROR) != 0) { |
---|
| 630 | ++e->receive_symbol_errors; |
---|
| 631 | } |
---|
| 632 | if ((stat & ETH_RX_STAT_LENGTH_ERROR) != 0) { |
---|
| 633 | ++e->receive_length_errors; |
---|
| 634 | } |
---|
| 635 | if ((stat & ETH_RX_STAT_ALIGNMENT_ERROR) != 0) { |
---|
| 636 | ++e->receive_alignment_errors; |
---|
| 637 | } |
---|
| 638 | if ((stat & ETH_RX_STAT_NO_DESCRIPTOR) != 0) { |
---|
| 639 | ++e->receive_no_descriptor_errors; |
---|
| 640 | } |
---|
| 641 | } |
---|
| 642 | |
---|
| 643 | /* Increment receive index */ |
---|
| 644 | receive_index = lpc_eth_increment(receive_index, index_max); |
---|
| 645 | } else { |
---|
| 646 | /* Nothing to do, enable receive interrupts */ |
---|
| 647 | lpc_eth_enable_receive_interrupts(); |
---|
| 648 | break; |
---|
| 649 | } |
---|
| 650 | } |
---|
| 651 | |
---|
| 652 | /* Wait for mbuf? */ |
---|
| 653 | wait_for_mbuf = |
---|
| 654 | lpc_eth_increment(produce_index, index_max) == consume_index; |
---|
| 655 | |
---|
| 656 | /* Fill queue with new mbufs */ |
---|
| 657 | while (consume_index != produce_index) { |
---|
| 658 | /* Add new mbuf to queue */ |
---|
| 659 | if ( |
---|
| 660 | !lpc_eth_add_new_mbuf(ifp, desc, mbufs, consume_index, wait_for_mbuf) |
---|
| 661 | ) { |
---|
| 662 | break; |
---|
| 663 | } |
---|
| 664 | |
---|
| 665 | /* We wait for at most one mbuf */ |
---|
| 666 | wait_for_mbuf = false; |
---|
| 667 | |
---|
| 668 | /* Increment consume index */ |
---|
| 669 | consume_index = lpc_eth_increment(consume_index, index_max); |
---|
| 670 | |
---|
| 671 | /* Update consume indices */ |
---|
| 672 | lpc_eth->rxconsumeindex = consume_index; |
---|
| 673 | } |
---|
| 674 | } |
---|
| 675 | |
---|
| 676 | cleanup: |
---|
| 677 | |
---|
| 678 | /* Clear task ID */ |
---|
| 679 | e->receive_task = RTEMS_ID_NONE; |
---|
| 680 | |
---|
| 681 | /* Release network semaphore */ |
---|
| 682 | rtems_bsdnet_semaphore_release(); |
---|
| 683 | |
---|
| 684 | /* Terminate self */ |
---|
| 685 | (void) rtems_task_delete(RTEMS_SELF); |
---|
| 686 | } |
---|
| 687 | |
---|
| 688 | static struct mbuf *lpc_eth_next_fragment( |
---|
| 689 | struct ifnet *ifp, |
---|
| 690 | struct mbuf *m, |
---|
| 691 | uint32_t *ctrl |
---|
| 692 | ) |
---|
| 693 | { |
---|
| 694 | struct mbuf *n = NULL; |
---|
| 695 | int size = 0; |
---|
| 696 | |
---|
| 697 | while (true) { |
---|
| 698 | if (m == NULL) { |
---|
| 699 | /* Dequeue first fragment of the next frame */ |
---|
| 700 | IF_DEQUEUE(&ifp->if_snd, m); |
---|
| 701 | |
---|
| 702 | /* Empty queue? */ |
---|
| 703 | if (m == NULL) { |
---|
| 704 | return m; |
---|
| 705 | } |
---|
| 706 | } |
---|
| 707 | |
---|
| 708 | /* Get fragment size */ |
---|
| 709 | size = m->m_len; |
---|
| 710 | |
---|
| 711 | if (size > 0) { |
---|
| 712 | /* Now we have a not empty fragment */ |
---|
| 713 | break; |
---|
| 714 | } else { |
---|
| 715 | /* Discard empty fragments */ |
---|
| 716 | m = m_free(m); |
---|
| 717 | } |
---|
| 718 | } |
---|
| 719 | |
---|
| 720 | /* Set fragment size */ |
---|
| 721 | *ctrl = (uint32_t) (size - 1); |
---|
| 722 | |
---|
| 723 | /* Discard empty successive fragments */ |
---|
| 724 | n = m->m_next; |
---|
| 725 | while (n != NULL && n->m_len <= 0) { |
---|
| 726 | n = m_free(n); |
---|
| 727 | } |
---|
| 728 | m->m_next = n; |
---|
| 729 | |
---|
| 730 | /* Is our fragment the last in the frame? */ |
---|
| 731 | if (n == NULL) { |
---|
| 732 | *ctrl |= LPC_ETH_LAST_FRAGMENT_FLAGS; |
---|
| 733 | } |
---|
| 734 | |
---|
| 735 | return m; |
---|
| 736 | } |
---|
| 737 | |
---|
| 738 | static void lpc_eth_transmit_task(void *arg) |
---|
| 739 | { |
---|
| 740 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
---|
| 741 | rtems_event_set events = 0; |
---|
| 742 | lpc_eth_driver_entry *e = (lpc_eth_driver_entry *) arg; |
---|
| 743 | struct ifnet *ifp = &e->arpcom.ac_if; |
---|
| 744 | volatile lpc_eth_transfer_descriptor *const desc = e->tx_desc_table; |
---|
| 745 | volatile uint32_t *const status = e->tx_status_table; |
---|
| 746 | #ifdef LPC_ETH_CONFIG_USE_TRANSMIT_DMA |
---|
| 747 | struct mbuf **const mbufs = e->tx_buf_table; |
---|
| 748 | #else |
---|
| 749 | char *const buf = e->tx_buf_table; |
---|
| 750 | #endif |
---|
| 751 | struct mbuf *m = NULL; |
---|
| 752 | uint32_t const index_max = e->tx_unit_count - 1; |
---|
| 753 | uint32_t produce_index = 0; |
---|
| 754 | uint32_t consume_index = 0; |
---|
| 755 | uint32_t ctrl = 0; |
---|
| 756 | #ifndef LPC_ETH_CONFIG_USE_TRANSMIT_DMA |
---|
| 757 | uint32_t frame_length = 0; |
---|
| 758 | char *frame_buffer = NULL; |
---|
| 759 | #endif |
---|
| 760 | |
---|
| 761 | LPC_ETH_PRINTF("%s\n", __func__); |
---|
| 762 | |
---|
| 763 | #ifndef LPC_ETH_CONFIG_USE_TRANSMIT_DMA |
---|
| 764 | /* Initialize descriptor table */ |
---|
| 765 | for (produce_index = 0; produce_index <= index_max; ++produce_index) { |
---|
| 766 | desc [produce_index].start = |
---|
| 767 | (uint32_t) (buf + produce_index * LPC_ETH_CONFIG_TX_BUF_SIZE); |
---|
| 768 | } |
---|
| 769 | #endif |
---|
| 770 | |
---|
| 771 | /* Main event loop */ |
---|
| 772 | while (true) { |
---|
| 773 | /* Wait for events */ |
---|
| 774 | sc = rtems_bsdnet_event_receive( |
---|
| 775 | LPC_ETH_EVENT_INITIALIZE |
---|
| 776 | | LPC_ETH_EVENT_START |
---|
| 777 | | LPC_ETH_EVENT_INTERRUPT, |
---|
| 778 | RTEMS_EVENT_ANY | RTEMS_WAIT, |
---|
| 779 | RTEMS_NO_TIMEOUT, |
---|
| 780 | &events |
---|
| 781 | ); |
---|
| 782 | RTEMS_CLEANUP_SC(sc, cleanup, "wait for events"); |
---|
| 783 | |
---|
| 784 | LPC_ETH_PRINTF("tx: wake up: 0x%08" PRIx32 "\n", events); |
---|
| 785 | |
---|
| 786 | /* Initialize transmitter? */ |
---|
| 787 | if ((events & LPC_ETH_EVENT_INITIALIZE) != 0) { |
---|
| 788 | /* Disable transmit interrupts */ |
---|
| 789 | lpc_eth_disable_transmit_interrupts(); |
---|
| 790 | |
---|
| 791 | /* Disable transmitter */ |
---|
| 792 | lpc_eth->command &= ~ETH_CMD_TX_ENABLE; |
---|
| 793 | |
---|
| 794 | /* Wait for inactive status */ |
---|
| 795 | while ((lpc_eth->status & ETH_STAT_TX_ACTIVE) != 0) { |
---|
| 796 | /* Wait */ |
---|
| 797 | } |
---|
| 798 | |
---|
| 799 | /* Reset */ |
---|
| 800 | lpc_eth->command |= ETH_CMD_TX_RESET; |
---|
| 801 | |
---|
| 802 | /* Clear transmit interrupts */ |
---|
| 803 | lpc_eth->intclear = LPC_ETH_INTERRUPT_TRANSMIT; |
---|
| 804 | |
---|
| 805 | /* Transmit descriptors */ |
---|
| 806 | lpc_eth->txdescriptornum = index_max; |
---|
| 807 | lpc_eth->txdescriptor = (uint32_t) desc; |
---|
| 808 | lpc_eth->txstatus = (uint32_t) status; |
---|
| 809 | |
---|
| 810 | #ifdef LPC_ETH_CONFIG_USE_TRANSMIT_DMA |
---|
| 811 | /* Discard outstanding fragments (= data loss) */ |
---|
| 812 | for (produce_index = 0; produce_index <= index_max; ++produce_index) { |
---|
| 813 | struct mbuf *victim = mbufs [produce_index]; |
---|
| 814 | |
---|
| 815 | if (victim != NULL) { |
---|
| 816 | m_free(victim); |
---|
| 817 | mbufs [produce_index] = NULL; |
---|
| 818 | } |
---|
| 819 | } |
---|
| 820 | #endif |
---|
| 821 | |
---|
| 822 | /* Initialize indices */ |
---|
| 823 | produce_index = lpc_eth->txproduceindex; |
---|
| 824 | consume_index = lpc_eth->txconsumeindex; |
---|
| 825 | |
---|
| 826 | #ifndef LPC_ETH_CONFIG_USE_TRANSMIT_DMA |
---|
| 827 | /* Fresh frame length and buffer start */ |
---|
| 828 | frame_length = 0; |
---|
| 829 | frame_buffer = (char *) desc [produce_index].start; |
---|
| 830 | #endif |
---|
| 831 | |
---|
| 832 | /* Enable transmitter */ |
---|
| 833 | lpc_eth->command |= ETH_CMD_TX_ENABLE; |
---|
| 834 | } |
---|
| 835 | |
---|
| 836 | /* Free consumed fragments */ |
---|
| 837 | while (true) { |
---|
| 838 | /* Save last known consume index */ |
---|
| 839 | uint32_t c = consume_index; |
---|
| 840 | |
---|
| 841 | /* Clear transmit interrupt status */ |
---|
| 842 | lpc_eth->intclear = LPC_ETH_INTERRUPT_TRANSMIT; |
---|
| 843 | |
---|
| 844 | /* Get new consume index */ |
---|
| 845 | consume_index = lpc_eth->txconsumeindex; |
---|
| 846 | |
---|
| 847 | /* Nothing consumed in the meantime? */ |
---|
| 848 | if (c == consume_index) { |
---|
| 849 | break; |
---|
| 850 | } |
---|
| 851 | |
---|
| 852 | while (c != consume_index) { |
---|
| 853 | uint32_t s = status [c]; |
---|
| 854 | |
---|
| 855 | /* Update error counters */ |
---|
| 856 | if ((s & (ETH_TX_STAT_ERROR | ETH_TX_STAT_NO_DESCRIPTOR)) != 0) { |
---|
| 857 | if ((s & ETH_TX_STAT_UNDERRUN) != 0) { |
---|
| 858 | ++e->transmit_underrun_errors; |
---|
| 859 | } |
---|
| 860 | if ((s & ETH_TX_STAT_LATE_COLLISION) != 0) { |
---|
| 861 | ++e->transmit_late_collision_errors; |
---|
| 862 | } |
---|
| 863 | if ((s & ETH_TX_STAT_EXCESSIVE_COLLISION) != 0) { |
---|
| 864 | ++e->transmit_excessive_collision_errors; |
---|
| 865 | } |
---|
| 866 | if ((s & ETH_TX_STAT_EXCESSIVE_DEFER) != 0) { |
---|
| 867 | ++e->transmit_excessive_defer_errors; |
---|
| 868 | } |
---|
| 869 | if ((s & ETH_TX_STAT_NO_DESCRIPTOR) != 0) { |
---|
| 870 | ++e->transmit_no_descriptor_errors; |
---|
| 871 | } |
---|
| 872 | } |
---|
| 873 | |
---|
| 874 | #ifdef LPC_ETH_CONFIG_USE_TRANSMIT_DMA |
---|
| 875 | /* Release mbuf */ |
---|
| 876 | m_free(mbufs [c]); |
---|
| 877 | mbufs [c] = NULL; |
---|
| 878 | #endif |
---|
| 879 | |
---|
| 880 | /* Next consume index */ |
---|
| 881 | c = lpc_eth_increment(c, index_max); |
---|
| 882 | } |
---|
| 883 | } |
---|
| 884 | |
---|
| 885 | /* Transmit new fragments */ |
---|
| 886 | while (true) { |
---|
| 887 | /* Compute next produce index */ |
---|
| 888 | uint32_t p = lpc_eth_increment(produce_index, index_max); |
---|
| 889 | |
---|
| 890 | /* Get next fragment and control value */ |
---|
| 891 | m = lpc_eth_next_fragment(ifp, m, &ctrl); |
---|
| 892 | |
---|
| 893 | /* Queue full? */ |
---|
| 894 | if (p == consume_index) { |
---|
| 895 | LPC_ETH_PRINTF("tx: full queue: 0x%08x\n", m); |
---|
| 896 | |
---|
| 897 | /* The queue is full, wait for transmit interrupt */ |
---|
| 898 | break; |
---|
| 899 | } |
---|
| 900 | |
---|
| 901 | /* New fragment? */ |
---|
| 902 | if (m != NULL) { |
---|
| 903 | #ifdef LPC_ETH_CONFIG_USE_TRANSMIT_DMA |
---|
| 904 | /* Set the transfer data */ |
---|
| 905 | rtems_cache_flush_multiple_data_lines( |
---|
| 906 | mtod(m, const void *), |
---|
| 907 | (size_t) m->m_len |
---|
| 908 | ); |
---|
| 909 | desc [produce_index].start = mtod(m, uint32_t); |
---|
| 910 | desc [produce_index].control = ctrl; |
---|
| 911 | rtems_cache_flush_multiple_data_lines( |
---|
| 912 | &desc [produce_index], |
---|
| 913 | sizeof(desc [0]) |
---|
| 914 | ); |
---|
| 915 | mbufs [produce_index] = m; |
---|
| 916 | |
---|
| 917 | LPC_ETH_PRINTF( |
---|
| 918 | "tx: %02" PRIu32 ": %u %s\n", |
---|
| 919 | produce_index, m->m_len, |
---|
| 920 | (ctrl & ETH_TX_CTRL_LAST) != 0 ? "L" : "" |
---|
| 921 | ); |
---|
| 922 | |
---|
| 923 | /* Next produce index */ |
---|
| 924 | produce_index = p; |
---|
| 925 | |
---|
| 926 | /* Last fragment of a frame? */ |
---|
| 927 | if ((ctrl & ETH_TX_CTRL_LAST) != 0) { |
---|
| 928 | /* Update the produce index */ |
---|
| 929 | lpc_eth->txproduceindex = produce_index; |
---|
| 930 | |
---|
| 931 | /* Increment transmitted frames counter */ |
---|
| 932 | ++e->transmitted_frames; |
---|
| 933 | } |
---|
| 934 | |
---|
| 935 | /* Next fragment of the frame */ |
---|
| 936 | m = m->m_next; |
---|
| 937 | #else |
---|
| 938 | size_t fragment_length = (size_t) m->m_len; |
---|
| 939 | void *fragment_start = mtod(m, void *); |
---|
| 940 | uint32_t new_frame_length = frame_length + fragment_length; |
---|
| 941 | |
---|
| 942 | /* Check buffer size */ |
---|
| 943 | if (new_frame_length > LPC_ETH_CONFIG_TX_BUF_SIZE) { |
---|
| 944 | LPC_ETH_PRINTF("tx: overflow\n"); |
---|
| 945 | |
---|
| 946 | /* Discard overflow data */ |
---|
| 947 | new_frame_length = LPC_ETH_CONFIG_TX_BUF_SIZE; |
---|
| 948 | fragment_length = new_frame_length - frame_length; |
---|
| 949 | |
---|
| 950 | /* Finalize frame */ |
---|
| 951 | ctrl |= LPC_ETH_LAST_FRAGMENT_FLAGS; |
---|
| 952 | |
---|
| 953 | /* Update error counter */ |
---|
| 954 | ++e->transmit_overflow_errors; |
---|
| 955 | } |
---|
| 956 | |
---|
| 957 | LPC_ETH_PRINTF( |
---|
| 958 | "tx: copy: %" PRIu32 "%s%s\n", |
---|
| 959 | fragment_length, |
---|
| 960 | (m->m_flags & M_EXT) != 0 ? ", E" : "", |
---|
| 961 | (m->m_flags & M_PKTHDR) != 0 ? ", H" : "" |
---|
| 962 | ); |
---|
| 963 | |
---|
| 964 | /* Copy fragment to buffer in Ethernet RAM */ |
---|
| 965 | memcpy(frame_buffer, fragment_start, fragment_length); |
---|
| 966 | |
---|
| 967 | if ((ctrl & ETH_TX_CTRL_LAST) != 0) { |
---|
| 968 | /* Finalize descriptor */ |
---|
| 969 | desc [produce_index].control = ctrl & ~ETH_TX_CTRL_SIZE_MASK |
---|
| 970 | | (new_frame_length - 1); |
---|
| 971 | |
---|
| 972 | LPC_ETH_PRINTF( |
---|
| 973 | "tx: %02" PRIu32 ": %" PRIu32 "\n", |
---|
| 974 | produce_index, |
---|
| 975 | new_frame_length |
---|
| 976 | ); |
---|
| 977 | |
---|
| 978 | /* Cache flush of data */ |
---|
| 979 | rtems_cache_flush_multiple_data_lines( |
---|
| 980 | (const void *) desc [produce_index].start, |
---|
| 981 | new_frame_length |
---|
| 982 | ); |
---|
| 983 | |
---|
| 984 | /* Cache flush of descriptor */ |
---|
| 985 | rtems_cache_flush_multiple_data_lines( |
---|
| 986 | &desc [produce_index], |
---|
| 987 | sizeof(desc [0]) |
---|
| 988 | ); |
---|
| 989 | |
---|
| 990 | /* Next produce index */ |
---|
| 991 | produce_index = p; |
---|
| 992 | |
---|
| 993 | /* Update the produce index */ |
---|
| 994 | lpc_eth->txproduceindex = produce_index; |
---|
| 995 | |
---|
| 996 | /* Fresh frame length and buffer start */ |
---|
| 997 | frame_length = 0; |
---|
| 998 | frame_buffer = (char *) desc [produce_index].start; |
---|
| 999 | |
---|
| 1000 | /* Increment transmitted frames counter */ |
---|
| 1001 | ++e->transmitted_frames; |
---|
| 1002 | } else { |
---|
| 1003 | /* New frame length */ |
---|
| 1004 | frame_length = new_frame_length; |
---|
| 1005 | |
---|
| 1006 | /* Update current frame buffer start */ |
---|
| 1007 | frame_buffer += fragment_length; |
---|
| 1008 | } |
---|
| 1009 | |
---|
| 1010 | /* Free mbuf and get next */ |
---|
| 1011 | m = m_free(m); |
---|
| 1012 | #endif |
---|
| 1013 | } else { |
---|
| 1014 | /* Nothing to transmit */ |
---|
| 1015 | break; |
---|
| 1016 | } |
---|
| 1017 | } |
---|
| 1018 | |
---|
| 1019 | /* No more fragments? */ |
---|
| 1020 | if (m == NULL) { |
---|
| 1021 | /* Interface is now inactive */ |
---|
| 1022 | ifp->if_flags &= ~IFF_OACTIVE; |
---|
| 1023 | } else { |
---|
| 1024 | LPC_ETH_PRINTF("tx: enable interrupts\n"); |
---|
| 1025 | |
---|
| 1026 | /* Enable transmit interrupts */ |
---|
| 1027 | lpc_eth_enable_transmit_interrupts(); |
---|
| 1028 | } |
---|
| 1029 | } |
---|
| 1030 | |
---|
| 1031 | cleanup: |
---|
| 1032 | |
---|
| 1033 | /* Clear task ID */ |
---|
| 1034 | e->transmit_task = RTEMS_ID_NONE; |
---|
| 1035 | |
---|
| 1036 | /* Release network semaphore */ |
---|
| 1037 | rtems_bsdnet_semaphore_release(); |
---|
| 1038 | |
---|
| 1039 | /* Terminate self */ |
---|
| 1040 | (void) rtems_task_delete(RTEMS_SELF); |
---|
| 1041 | } |
---|
| 1042 | |
---|
| 1043 | static void lpc_eth_interface_init(void *arg) |
---|
| 1044 | { |
---|
| 1045 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
---|
| 1046 | lpc_eth_driver_entry *e = (lpc_eth_driver_entry *) arg; |
---|
| 1047 | struct ifnet *ifp = &e->arpcom.ac_if; |
---|
| 1048 | |
---|
| 1049 | LPC_ETH_PRINTF("%s\n", __func__); |
---|
| 1050 | |
---|
| 1051 | if (e->state == LPC_ETH_INITIALIZED) { |
---|
| 1052 | lpc_eth_config_module_enable(); |
---|
| 1053 | |
---|
| 1054 | /* Soft reset */ |
---|
| 1055 | |
---|
| 1056 | /* Do soft reset */ |
---|
| 1057 | lpc_eth->command = 0x38; |
---|
| 1058 | lpc_eth->mac1 = 0xcf00; |
---|
| 1059 | lpc_eth->mac1 = 0x0; |
---|
| 1060 | |
---|
| 1061 | /* Initialize PHY */ |
---|
| 1062 | /* TODO */ |
---|
| 1063 | |
---|
| 1064 | /* Reinitialize registers */ |
---|
| 1065 | lpc_eth->mac2 = 0x31; |
---|
| 1066 | lpc_eth->ipgt = 0x15; |
---|
| 1067 | lpc_eth->ipgr = 0x12; |
---|
| 1068 | lpc_eth->clrt = 0x370f; |
---|
| 1069 | lpc_eth->maxf = 0x0600; |
---|
| 1070 | lpc_eth->supp = 0x0100; |
---|
| 1071 | lpc_eth->test = 0; |
---|
| 1072 | #ifdef LPC_ETH_CONFIG_RMII |
---|
| 1073 | lpc_eth->command = 0x0600; |
---|
| 1074 | #else |
---|
| 1075 | lpc_eth->command = 0x0400; |
---|
| 1076 | #endif |
---|
| 1077 | lpc_eth->intenable = 0; |
---|
| 1078 | lpc_eth->intclear = 0x30ff; |
---|
| 1079 | lpc_eth->powerdown = 0; |
---|
| 1080 | |
---|
| 1081 | /* MAC address */ |
---|
| 1082 | lpc_eth->sa0 = ((uint32_t) e->arpcom.ac_enaddr [5] << 8) |
---|
| 1083 | | (uint32_t) e->arpcom.ac_enaddr [4]; |
---|
| 1084 | lpc_eth->sa1 = ((uint32_t) e->arpcom.ac_enaddr [3] << 8) |
---|
| 1085 | | (uint32_t) e->arpcom.ac_enaddr [2]; |
---|
| 1086 | lpc_eth->sa2 = ((uint32_t) e->arpcom.ac_enaddr [1] << 8) |
---|
| 1087 | | (uint32_t) e->arpcom.ac_enaddr [0]; |
---|
| 1088 | |
---|
| 1089 | /* Enable receiver */ |
---|
| 1090 | lpc_eth->mac1 = 0x03; |
---|
| 1091 | |
---|
| 1092 | /* Start receive task */ |
---|
| 1093 | if (e->receive_task == RTEMS_ID_NONE) { |
---|
| 1094 | e->receive_task = rtems_bsdnet_newproc( |
---|
| 1095 | "ntrx", |
---|
| 1096 | 4096, |
---|
| 1097 | lpc_eth_receive_task, |
---|
| 1098 | e |
---|
| 1099 | ); |
---|
| 1100 | sc = rtems_event_send(e->receive_task, LPC_ETH_EVENT_INITIALIZE); |
---|
| 1101 | RTEMS_SYSLOG_ERROR_SC(sc, "send receive initialize event"); |
---|
| 1102 | } |
---|
| 1103 | |
---|
| 1104 | /* Start transmit task */ |
---|
| 1105 | if (e->transmit_task == RTEMS_ID_NONE) { |
---|
| 1106 | e->transmit_task = rtems_bsdnet_newproc( |
---|
| 1107 | "nttx", |
---|
| 1108 | 4096, |
---|
| 1109 | lpc_eth_transmit_task, |
---|
| 1110 | e |
---|
| 1111 | ); |
---|
| 1112 | sc = rtems_event_send(e->transmit_task, LPC_ETH_EVENT_INITIALIZE); |
---|
| 1113 | RTEMS_SYSLOG_ERROR_SC(sc, "send transmit initialize event"); |
---|
| 1114 | } |
---|
| 1115 | |
---|
| 1116 | /* Change state */ |
---|
| 1117 | if ( |
---|
| 1118 | e->receive_task != RTEMS_ID_NONE && e->transmit_task != RTEMS_ID_NONE |
---|
| 1119 | ) { |
---|
| 1120 | e->state = LPC_ETH_STARTED; |
---|
| 1121 | } |
---|
| 1122 | } |
---|
| 1123 | |
---|
| 1124 | if (e->state == LPC_ETH_STARTED) { |
---|
| 1125 | /* Enable fatal interrupts */ |
---|
| 1126 | lpc_eth->intenable = ETH_INT_RX_OVERRUN | ETH_INT_TX_UNDERRUN; |
---|
| 1127 | |
---|
| 1128 | /* Enable promiscous mode */ |
---|
| 1129 | lpc_eth_enable_promiscous_mode((ifp->if_flags & IFF_PROMISC) != 0); |
---|
| 1130 | |
---|
| 1131 | /* Start watchdog timer */ |
---|
| 1132 | ifp->if_timer = 1; |
---|
| 1133 | |
---|
| 1134 | /* Set interface to running state */ |
---|
| 1135 | ifp->if_flags |= IFF_RUNNING; |
---|
| 1136 | |
---|
| 1137 | /* Change state */ |
---|
| 1138 | e->state = LPC_ETH_RUNNING; |
---|
| 1139 | } |
---|
| 1140 | } |
---|
| 1141 | |
---|
| 1142 | static void lpc_eth_interface_stats(const lpc_eth_driver_entry *e) |
---|
| 1143 | { |
---|
| 1144 | rtems_bsdnet_semaphore_release(); |
---|
| 1145 | |
---|
| 1146 | printf("received frames: %u\n", e->received_frames); |
---|
| 1147 | printf("receive interrupts: %u\n", e->receive_interrupts); |
---|
| 1148 | printf("transmitted frames: %u\n", e->transmitted_frames); |
---|
| 1149 | printf("transmit interrupts: %u\n", e->transmit_interrupts); |
---|
| 1150 | printf("receive overrun errors: %u\n", e->receive_overrun_errors); |
---|
| 1151 | printf("receive fragment errors: %u\n", e->receive_fragment_errors); |
---|
| 1152 | printf("receive CRC errors: %u\n", e->receive_crc_errors); |
---|
| 1153 | printf("receive symbol errors: %u\n", e->receive_symbol_errors); |
---|
| 1154 | printf("receive length errors: %u\n", e->receive_length_errors); |
---|
| 1155 | printf("receive alignment errors: %u\n", e->receive_alignment_errors); |
---|
| 1156 | printf("receive no descriptor errors: %u\n", e->receive_no_descriptor_errors); |
---|
| 1157 | printf("receive fatal errors: %u\n", e->receive_fatal_errors); |
---|
| 1158 | printf("transmit underrun errors: %u\n", e->transmit_underrun_errors); |
---|
| 1159 | printf("transmit late collision errors: %u\n", e->transmit_late_collision_errors); |
---|
| 1160 | printf("transmit excessive collision errors: %u\n", e->transmit_excessive_collision_errors); |
---|
| 1161 | printf("transmit excessive defer errors: %u\n", e->transmit_excessive_defer_errors); |
---|
| 1162 | printf("transmit no descriptor errors: %u\n", e->transmit_no_descriptor_errors); |
---|
| 1163 | printf("transmit overflow errors: %u\n", e->transmit_overflow_errors); |
---|
| 1164 | printf("transmit fatal errors: %u\n", e->transmit_fatal_errors); |
---|
| 1165 | |
---|
| 1166 | rtems_bsdnet_semaphore_obtain(); |
---|
| 1167 | } |
---|
| 1168 | |
---|
| 1169 | static int lpc_eth_interface_ioctl( |
---|
| 1170 | struct ifnet *ifp, |
---|
| 1171 | ioctl_command_t command, |
---|
| 1172 | caddr_t data |
---|
| 1173 | ) |
---|
| 1174 | { |
---|
| 1175 | lpc_eth_driver_entry *e = (lpc_eth_driver_entry *) ifp->if_softc; |
---|
| 1176 | int rv = 0; |
---|
| 1177 | |
---|
| 1178 | LPC_ETH_PRINTF("%s\n", __func__); |
---|
| 1179 | |
---|
| 1180 | switch (command) { |
---|
| 1181 | case SIOCGIFMEDIA: |
---|
| 1182 | case SIOCSIFMEDIA: |
---|
| 1183 | rtems_mii_ioctl(&e->mdio_info, e, (int) command, (int *) data); |
---|
| 1184 | break; |
---|
| 1185 | case SIOCGIFADDR: |
---|
| 1186 | case SIOCSIFADDR: |
---|
| 1187 | ether_ioctl(ifp, command, data); |
---|
| 1188 | break; |
---|
| 1189 | case SIOCSIFFLAGS: |
---|
| 1190 | if (ifp->if_flags & IFF_RUNNING) { |
---|
| 1191 | /* TODO: off */ |
---|
| 1192 | } |
---|
| 1193 | if (ifp->if_flags & IFF_UP) { |
---|
| 1194 | ifp->if_flags |= IFF_RUNNING; |
---|
| 1195 | /* TODO: init */ |
---|
| 1196 | } |
---|
| 1197 | break; |
---|
| 1198 | case SIO_RTEMS_SHOW_STATS: |
---|
| 1199 | lpc_eth_interface_stats(e); |
---|
| 1200 | break; |
---|
| 1201 | default: |
---|
| 1202 | rv = EINVAL; |
---|
| 1203 | break; |
---|
| 1204 | } |
---|
| 1205 | |
---|
| 1206 | return rv; |
---|
| 1207 | } |
---|
| 1208 | |
---|
| 1209 | static void lpc_eth_interface_start(struct ifnet *ifp) |
---|
| 1210 | { |
---|
| 1211 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
---|
| 1212 | lpc_eth_driver_entry *e = (lpc_eth_driver_entry *) ifp->if_softc; |
---|
| 1213 | |
---|
| 1214 | ifp->if_flags |= IFF_OACTIVE; |
---|
| 1215 | |
---|
| 1216 | sc = rtems_event_send(e->transmit_task, LPC_ETH_EVENT_START); |
---|
| 1217 | RTEMS_SYSLOG_ERROR_SC(sc, "send transmit start event"); |
---|
| 1218 | } |
---|
| 1219 | |
---|
| 1220 | static void lpc_eth_interface_watchdog(struct ifnet *ifp __attribute__((unused))) |
---|
| 1221 | { |
---|
| 1222 | LPC_ETH_PRINTF("%s\n", __func__); |
---|
| 1223 | } |
---|
| 1224 | |
---|
| 1225 | static unsigned lpc_eth_fixup_unit_count(int count, int default_value, int max) |
---|
| 1226 | { |
---|
| 1227 | if (count <= 0) { |
---|
| 1228 | count = default_value; |
---|
| 1229 | } else if (count > max) { |
---|
| 1230 | count = max; |
---|
| 1231 | } |
---|
| 1232 | |
---|
| 1233 | return LPC_ETH_CONFIG_UNIT_MULTIPLE |
---|
| 1234 | + (((unsigned) count - 1U) & ~(LPC_ETH_CONFIG_UNIT_MULTIPLE - 1U)); |
---|
| 1235 | } |
---|
| 1236 | |
---|
| 1237 | static int lpc_eth_attach(struct rtems_bsdnet_ifconfig *config) |
---|
| 1238 | { |
---|
| 1239 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
---|
| 1240 | lpc_eth_driver_entry *e = &lpc_eth_driver_data; |
---|
| 1241 | struct ifnet *ifp = &e->arpcom.ac_if; |
---|
| 1242 | char *unit_name = NULL; |
---|
| 1243 | int unit_index = rtems_bsdnet_parse_driver_name(config, &unit_name); |
---|
| 1244 | size_t table_area_size = 0; |
---|
| 1245 | char *table_area = NULL; |
---|
| 1246 | char *table_location = NULL; |
---|
| 1247 | |
---|
| 1248 | /* Check parameter */ |
---|
| 1249 | if (unit_index < 0) { |
---|
| 1250 | RTEMS_SYSLOG_ERROR("parse error for interface name\n"); |
---|
| 1251 | return 0; |
---|
| 1252 | } |
---|
| 1253 | if (unit_index != 0) { |
---|
| 1254 | RTEMS_DO_CLEANUP(cleanup, "unexpected unit number"); |
---|
| 1255 | } |
---|
| 1256 | if (config->hardware_address == NULL) { |
---|
| 1257 | RTEMS_DO_CLEANUP(cleanup, "MAC address missing"); |
---|
| 1258 | } |
---|
| 1259 | if (e->state != LPC_ETH_NOT_INITIALIZED) { |
---|
| 1260 | RTEMS_DO_CLEANUP(cleanup, "already attached"); |
---|
| 1261 | } |
---|
| 1262 | |
---|
| 1263 | /* Interrupt number */ |
---|
| 1264 | config->irno = LPC_ETH_CONFIG_INTERRUPT; |
---|
| 1265 | |
---|
| 1266 | /* Device control */ |
---|
| 1267 | config->drv_ctrl = e; |
---|
| 1268 | |
---|
| 1269 | /* Receive unit count */ |
---|
| 1270 | e->rx_unit_count = lpc_eth_fixup_unit_count( |
---|
| 1271 | config->rbuf_count, |
---|
| 1272 | LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT, |
---|
| 1273 | LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX |
---|
| 1274 | ); |
---|
| 1275 | config->rbuf_count = (int) e->rx_unit_count; |
---|
| 1276 | |
---|
| 1277 | /* Transmit unit count */ |
---|
| 1278 | e->tx_unit_count = lpc_eth_fixup_unit_count( |
---|
| 1279 | config->xbuf_count, |
---|
| 1280 | LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT, |
---|
| 1281 | LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX |
---|
| 1282 | ); |
---|
| 1283 | config->xbuf_count = (int) e->tx_unit_count; |
---|
| 1284 | |
---|
| 1285 | /* Disable interrupts */ |
---|
| 1286 | lpc_eth->intenable = 0; |
---|
| 1287 | |
---|
| 1288 | /* Install interrupt handler */ |
---|
| 1289 | sc = rtems_interrupt_handler_install( |
---|
| 1290 | config->irno, |
---|
| 1291 | "Ethernet", |
---|
| 1292 | RTEMS_INTERRUPT_UNIQUE, |
---|
| 1293 | lpc_eth_interrupt_handler, |
---|
| 1294 | e |
---|
| 1295 | ); |
---|
| 1296 | RTEMS_CLEANUP_SC(sc, cleanup, "install interrupt handler"); |
---|
| 1297 | |
---|
| 1298 | /* Copy MAC address */ |
---|
| 1299 | memcpy(e->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN); |
---|
| 1300 | |
---|
| 1301 | /* Allocate and clear table area */ |
---|
| 1302 | table_area_size = |
---|
| 1303 | e->rx_unit_count |
---|
| 1304 | * (sizeof(lpc_eth_transfer_descriptor) |
---|
| 1305 | + sizeof(lpc_eth_receive_status) |
---|
| 1306 | + sizeof(struct mbuf *)) |
---|
| 1307 | + e->tx_unit_count |
---|
| 1308 | * (sizeof(lpc_eth_transfer_descriptor) |
---|
| 1309 | + sizeof(uint32_t) |
---|
| 1310 | + LPC_ETH_CONFIG_TX_BUF_SIZE); |
---|
| 1311 | table_area = lpc_eth_config_alloc_table_area(table_area_size); |
---|
| 1312 | if (table_area == NULL) { |
---|
| 1313 | RTEMS_DO_CLEANUP(cleanup, "no memory for table area"); |
---|
| 1314 | } |
---|
| 1315 | memset(table_area, 0, table_area_size); |
---|
| 1316 | |
---|
| 1317 | table_location = table_area; |
---|
| 1318 | |
---|
| 1319 | /* |
---|
| 1320 | * The receive status table must be the first one since it has the strictest |
---|
| 1321 | * alignment requirements. |
---|
| 1322 | */ |
---|
| 1323 | e->rx_status_table = (volatile lpc_eth_receive_status *) table_location; |
---|
| 1324 | table_location += e->rx_unit_count * sizeof(e->rx_status_table [0]); |
---|
| 1325 | |
---|
| 1326 | e->rx_desc_table = (volatile lpc_eth_transfer_descriptor *) table_location; |
---|
| 1327 | table_location += e->rx_unit_count * sizeof(e->rx_desc_table [0]); |
---|
| 1328 | |
---|
| 1329 | e->rx_mbuf_table = (struct mbuf **) table_location; |
---|
| 1330 | table_location += e->rx_unit_count * sizeof(e->rx_mbuf_table [0]); |
---|
| 1331 | |
---|
| 1332 | e->tx_desc_table = (volatile lpc_eth_transfer_descriptor *) table_location; |
---|
| 1333 | table_location += e->tx_unit_count * sizeof(e->tx_desc_table [0]); |
---|
| 1334 | |
---|
| 1335 | e->tx_status_table = (volatile uint32_t *) table_location; |
---|
| 1336 | table_location += e->tx_unit_count * sizeof(e->tx_status_table [0]); |
---|
| 1337 | |
---|
| 1338 | e->tx_buf_table = table_location; |
---|
| 1339 | |
---|
| 1340 | /* Set interface data */ |
---|
| 1341 | ifp->if_softc = e; |
---|
| 1342 | ifp->if_unit = (short) unit_index; |
---|
| 1343 | ifp->if_name = unit_name; |
---|
| 1344 | ifp->if_mtu = (config->mtu > 0) ? (u_long) config->mtu : ETHERMTU; |
---|
| 1345 | ifp->if_init = lpc_eth_interface_init; |
---|
| 1346 | ifp->if_ioctl = lpc_eth_interface_ioctl; |
---|
| 1347 | ifp->if_start = lpc_eth_interface_start; |
---|
| 1348 | ifp->if_output = ether_output; |
---|
| 1349 | ifp->if_watchdog = lpc_eth_interface_watchdog; |
---|
| 1350 | ifp->if_flags = config->ignore_broadcast ? 0 : IFF_BROADCAST; |
---|
| 1351 | ifp->if_snd.ifq_maxlen = ifqmaxlen; |
---|
| 1352 | ifp->if_timer = 0; |
---|
| 1353 | |
---|
| 1354 | /* Change status */ |
---|
| 1355 | e->state = LPC_ETH_INITIALIZED; |
---|
| 1356 | |
---|
| 1357 | /* Attach the interface */ |
---|
| 1358 | if_attach(ifp); |
---|
| 1359 | ether_ifattach(ifp); |
---|
| 1360 | |
---|
| 1361 | return 1; |
---|
| 1362 | |
---|
| 1363 | cleanup: |
---|
| 1364 | |
---|
| 1365 | lpc_eth_config_free_table_area(table_area); |
---|
| 1366 | |
---|
| 1367 | /* FIXME: Type */ |
---|
| 1368 | free(unit_name, (int) 0xdeadbeef); |
---|
| 1369 | |
---|
| 1370 | return 0; |
---|
| 1371 | } |
---|
| 1372 | |
---|
| 1373 | static int lpc_eth_detach( |
---|
| 1374 | struct rtems_bsdnet_ifconfig *config __attribute__((unused)) |
---|
| 1375 | ) |
---|
| 1376 | { |
---|
| 1377 | /* FIXME: Detach the interface from the upper layers? */ |
---|
| 1378 | |
---|
| 1379 | /* Module soft reset */ |
---|
| 1380 | lpc_eth->command = 0x38; |
---|
| 1381 | lpc_eth->mac1 = 0xcf00; |
---|
| 1382 | |
---|
| 1383 | /* FIXME: More cleanup */ |
---|
| 1384 | |
---|
| 1385 | return 0; |
---|
| 1386 | } |
---|
| 1387 | |
---|
| 1388 | int lpc_eth_attach_detach( |
---|
| 1389 | struct rtems_bsdnet_ifconfig *config, |
---|
| 1390 | int attaching |
---|
| 1391 | ) |
---|
| 1392 | { |
---|
| 1393 | /* FIXME: Return value */ |
---|
| 1394 | |
---|
| 1395 | if (attaching) { |
---|
| 1396 | return lpc_eth_attach(config); |
---|
| 1397 | } else { |
---|
| 1398 | return lpc_eth_detach(config); |
---|
| 1399 | } |
---|
| 1400 | } |
---|