source: rtems/c/src/lib/libbsp/arm/shared/lpc/include/lpc-timer.h @ c468f18b

4.104.11
Last change on this file since c468f18b was c468f18b, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on Dec 15, 2009 at 3:20:47 PM

add support for LPC32xx

  • Property mode set to 100644
File size: 2.3 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup lpc
5 *
6 * @brief Timer API.
7 */
8
9/*
10 * Copyright (c) 2009
11 * embedded brains GmbH
12 * Obere Lagerstr. 30
13 * D-82178 Puchheim
14 * Germany
15 * <rtems@embedded-brains.de>
16 *
17 * The license and distribution terms for this file may be
18 * found in the file LICENSE in this distribution or at
19 * http://www.rtems.com/license/LICENSE.
20 */
21
22#ifndef LIBBSP_ARM_SHARED_LPC_TIMER_H
23#define LIBBSP_ARM_SHARED_LPC_TIMER_H
24
25#include <stdint.h>
26
27#ifdef __cplusplus
28extern "C" {
29#endif
30
31#define LPC_TIMER_IR_MR0 0x1U
32#define LPC_TIMER_IR_MR1 0x2U
33#define LPC_TIMER_IR_MR2 0x4U
34#define LPC_TIMER_IR_MR3 0x8U
35#define LPC_TIMER_IR_CR0 0x10U
36#define LPC_TIMER_IR_CR1 0x20U
37#define LPC_TIMER_IR_CR2 0x40U
38#define LPC_TIMER_IR_CR3 0x80U
39#define LPC_TIMER_IR_ALL 0xffU
40
41#define LPC_TIMER_TCR_EN 0x1U
42#define LPC_TIMER_TCR_RST 0x2U
43
44#define LPC_TIMER_MCR_MR0_INTR 0x1U
45#define LPC_TIMER_MCR_MR0_RST 0x2U
46#define LPC_TIMER_MCR_MR0_STOP 0x4U
47#define LPC_TIMER_MCR_MR1_INTR 0x8U
48#define LPC_TIMER_MCR_MR1_RST 0x10U
49#define LPC_TIMER_MCR_MR1_STOP 0x20U
50#define LPC_TIMER_MCR_MR2_INTR 0x40U
51#define LPC_TIMER_MCR_MR2_RST 0x80U
52#define LPC_TIMER_MCR_MR2_STOP 0x100U
53#define LPC_TIMER_MCR_MR3_INTR 0x200U
54#define LPC_TIMER_MCR_MR3_RST 0x400U
55#define LPC_TIMER_MCR_MR3_STOP 0x800U
56
57#define LPC_TIMER_CCR_CAP0_RE 0x1U
58#define LPC_TIMER_CCR_CAP0_FE 0x2U
59#define LPC_TIMER_CCR_CAP0_INTR 0x4U
60#define LPC_TIMER_CCR_CAP1_RE 0x8U
61#define LPC_TIMER_CCR_CAP1_FE 0x10U
62#define LPC_TIMER_CCR_CAP1_INTR 0x20U
63#define LPC_TIMER_CCR_CAP2_RE 0x40U
64#define LPC_TIMER_CCR_CAP2_FE 0x80U
65#define LPC_TIMER_CCR_CAP2_INTR 0x100U
66#define LPC_TIMER_CCR_CAP3_RE 0x200U
67#define LPC_TIMER_CCR_CAP3_FE 0x400U
68#define LPC_TIMER_CCR_CAP3_INTR 0x800U
69
70#define LPC_TIMER_EMR_EM0_RE 0x1U
71#define LPC_TIMER_EMR_EM1_FE 0x2U
72#define LPC_TIMER_EMR_EM2_INTR 0x4U
73#define LPC_TIMER_EMR_EM3_RE 0x8U
74#define LPC_TIMER_EMR_EMC0_FE 0x10U
75#define LPC_TIMER_EMR_EMC1_INTR 0x20U
76#define LPC_TIMER_EMR_EMC2_RE 0x40U
77#define LPC_TIMER_EMR_EMC3_FE 0x80U
78
79typedef struct {
80  uint32_t ir;
81  uint32_t tcr;
82  uint32_t tc;
83  uint32_t pr;
84  uint32_t pc;
85  uint32_t mcr;
86  uint32_t mr0;
87  uint32_t mr1;
88  uint32_t mr2;
89  uint32_t mr3;
90  uint32_t ccr;
91  uint32_t cr0;
92  uint32_t cr1;
93  uint32_t cr2;
94  uint32_t cr3;
95  uint32_t emr;
96  uint32_t ctcr;
97} lpc_timer;
98
99#ifdef __cplusplus
100}
101#endif /* __cplusplus */
102
103#endif /* LIBBSP_ARM_SHARED_LPC_TIMER_H */
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