1 | /** |
---|
2 | * @file |
---|
3 | * |
---|
4 | * @ingroup lpc_timer |
---|
5 | * |
---|
6 | * @brief Timer API. |
---|
7 | */ |
---|
8 | |
---|
9 | /* |
---|
10 | * Copyright (c) 2009 |
---|
11 | * embedded brains GmbH |
---|
12 | * Obere Lagerstr. 30 |
---|
13 | * D-82178 Puchheim |
---|
14 | * Germany |
---|
15 | * <rtems@embedded-brains.de> |
---|
16 | * |
---|
17 | * The license and distribution terms for this file may be |
---|
18 | * found in the file LICENSE in this distribution or at |
---|
19 | * http://www.rtems.com/license/LICENSE. |
---|
20 | */ |
---|
21 | |
---|
22 | #ifndef LIBBSP_ARM_SHARED_LPC_TIMER_H |
---|
23 | #define LIBBSP_ARM_SHARED_LPC_TIMER_H |
---|
24 | |
---|
25 | #include <stdint.h> |
---|
26 | |
---|
27 | #ifdef __cplusplus |
---|
28 | extern "C" { |
---|
29 | #endif |
---|
30 | |
---|
31 | /** |
---|
32 | * @defgroup lpc_timer Timer Support |
---|
33 | * |
---|
34 | * @ingroup lpc |
---|
35 | * |
---|
36 | * @brief Timer support. |
---|
37 | * |
---|
38 | * @{ |
---|
39 | */ |
---|
40 | |
---|
41 | /** |
---|
42 | * @name Interrupt Register Defines |
---|
43 | * |
---|
44 | * @{ |
---|
45 | */ |
---|
46 | |
---|
47 | #define LPC_TIMER_IR_MR0 0x1U |
---|
48 | #define LPC_TIMER_IR_MR1 0x2U |
---|
49 | #define LPC_TIMER_IR_MR2 0x4U |
---|
50 | #define LPC_TIMER_IR_MR3 0x8U |
---|
51 | #define LPC_TIMER_IR_CR0 0x10U |
---|
52 | #define LPC_TIMER_IR_CR1 0x20U |
---|
53 | #define LPC_TIMER_IR_CR2 0x40U |
---|
54 | #define LPC_TIMER_IR_CR3 0x80U |
---|
55 | #define LPC_TIMER_IR_ALL 0xffU |
---|
56 | |
---|
57 | /** @} */ |
---|
58 | |
---|
59 | /** |
---|
60 | * @name Timer Control Register Defines |
---|
61 | * |
---|
62 | * @{ |
---|
63 | */ |
---|
64 | |
---|
65 | #define LPC_TIMER_TCR_EN 0x1U |
---|
66 | #define LPC_TIMER_TCR_RST 0x2U |
---|
67 | |
---|
68 | /** @} */ |
---|
69 | |
---|
70 | /** |
---|
71 | * @name Match Control Register Defines |
---|
72 | * |
---|
73 | * @{ |
---|
74 | */ |
---|
75 | |
---|
76 | #define LPC_TIMER_MCR_MR0_INTR 0x1U |
---|
77 | #define LPC_TIMER_MCR_MR0_RST 0x2U |
---|
78 | #define LPC_TIMER_MCR_MR0_STOP 0x4U |
---|
79 | #define LPC_TIMER_MCR_MR1_INTR 0x8U |
---|
80 | #define LPC_TIMER_MCR_MR1_RST 0x10U |
---|
81 | #define LPC_TIMER_MCR_MR1_STOP 0x20U |
---|
82 | #define LPC_TIMER_MCR_MR2_INTR 0x40U |
---|
83 | #define LPC_TIMER_MCR_MR2_RST 0x80U |
---|
84 | #define LPC_TIMER_MCR_MR2_STOP 0x100U |
---|
85 | #define LPC_TIMER_MCR_MR3_INTR 0x200U |
---|
86 | #define LPC_TIMER_MCR_MR3_RST 0x400U |
---|
87 | #define LPC_TIMER_MCR_MR3_STOP 0x800U |
---|
88 | |
---|
89 | /** @} */ |
---|
90 | |
---|
91 | /** |
---|
92 | * @name Capture Control Register Defines |
---|
93 | * |
---|
94 | * @{ |
---|
95 | */ |
---|
96 | |
---|
97 | #define LPC_TIMER_CCR_CAP0_RE 0x1U |
---|
98 | #define LPC_TIMER_CCR_CAP0_FE 0x2U |
---|
99 | #define LPC_TIMER_CCR_CAP0_INTR 0x4U |
---|
100 | #define LPC_TIMER_CCR_CAP1_RE 0x8U |
---|
101 | #define LPC_TIMER_CCR_CAP1_FE 0x10U |
---|
102 | #define LPC_TIMER_CCR_CAP1_INTR 0x20U |
---|
103 | #define LPC_TIMER_CCR_CAP2_RE 0x40U |
---|
104 | #define LPC_TIMER_CCR_CAP2_FE 0x80U |
---|
105 | #define LPC_TIMER_CCR_CAP2_INTR 0x100U |
---|
106 | #define LPC_TIMER_CCR_CAP3_RE 0x200U |
---|
107 | #define LPC_TIMER_CCR_CAP3_FE 0x400U |
---|
108 | #define LPC_TIMER_CCR_CAP3_INTR 0x800U |
---|
109 | |
---|
110 | /** @} */ |
---|
111 | |
---|
112 | /** |
---|
113 | * @name External Match Register Defines |
---|
114 | * |
---|
115 | * @{ |
---|
116 | */ |
---|
117 | |
---|
118 | #define LPC_TIMER_EMR_EM0_RE 0x1U |
---|
119 | #define LPC_TIMER_EMR_EM1_FE 0x2U |
---|
120 | #define LPC_TIMER_EMR_EM2_INTR 0x4U |
---|
121 | #define LPC_TIMER_EMR_EM3_RE 0x8U |
---|
122 | #define LPC_TIMER_EMR_EMC0_FE 0x10U |
---|
123 | #define LPC_TIMER_EMR_EMC1_INTR 0x20U |
---|
124 | #define LPC_TIMER_EMR_EMC2_RE 0x40U |
---|
125 | #define LPC_TIMER_EMR_EMC3_FE 0x80U |
---|
126 | |
---|
127 | /** @} */ |
---|
128 | |
---|
129 | /** |
---|
130 | * @brief Timer control block. |
---|
131 | */ |
---|
132 | typedef struct { |
---|
133 | uint32_t ir; |
---|
134 | uint32_t tcr; |
---|
135 | uint32_t tc; |
---|
136 | uint32_t pr; |
---|
137 | uint32_t pc; |
---|
138 | uint32_t mcr; |
---|
139 | uint32_t mr0; |
---|
140 | uint32_t mr1; |
---|
141 | uint32_t mr2; |
---|
142 | uint32_t mr3; |
---|
143 | uint32_t ccr; |
---|
144 | uint32_t cr0; |
---|
145 | uint32_t cr1; |
---|
146 | uint32_t cr2; |
---|
147 | uint32_t cr3; |
---|
148 | uint32_t emr; |
---|
149 | uint32_t ctcr; |
---|
150 | } lpc_timer; |
---|
151 | |
---|
152 | /** @} */ |
---|
153 | |
---|
154 | #ifdef __cplusplus |
---|
155 | } |
---|
156 | #endif /* __cplusplus */ |
---|
157 | |
---|
158 | #endif /* LIBBSP_ARM_SHARED_LPC_TIMER_H */ |
---|