source: rtems/c/src/lib/libbsp/arm/shared/lpc/include/lpc-i2s.h @ a3579d3b

4.115
Last change on this file since a3579d3b was a3579d3b, checked in by Sebastian Huber <sebastian.huber@…>, on 12/03/10 at 09:23:52

2010-12-03 Sebastian Huber <sebastian.huber@…>

  • preinstall.am, shared/lpc/include/lpc-i2s.h, shared/startup/linkcmds.armv4, shared/startup/linkcmds.armv7: New files.
  • Makefile.am: Added header and linker command files intended to be used by every ARM BSP.
  • shared/startup/linkcmds.base: Support for EABI and ARM ELF standard.
  • shared/include/linker-symbols.h: Update due to linker command file changes.
  • shared/start/start.S, shared/include/start.h: Renamed entry symbol from start to _start to avoid namespace conflicts. Update due to linker command file changes.
  • Property mode set to 100644
File size: 2.3 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup lpc_i2s
5 *
6 * @brief I2S API.
7 */
8
9/*
10 * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Obere Lagerstr. 30
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.com/license/LICENSE.
21 */
22
23#ifndef LIBBSP_ARM_SHARED_LPC_I2S_H
24#define LIBBSP_ARM_SHARED_LPC_I2S_H
25
26#include <bsp/utility.h>
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
32/**
33 * @defgroup lpc_dma I2S Support
34 *
35 * @ingroup lpc
36 *
37 * @brief I2S support.
38 *
39 * @{
40 */
41
42/**
43 * @brief I2S control block.
44 */
45typedef struct {
46  uint32_t dao;
47  uint32_t dai;
48  uint32_t txfifo;
49  uint32_t rxfifo;
50  uint32_t state;
51  uint32_t dma [2];
52  uint32_t irq;
53  uint32_t txrate;
54  uint32_t rxrate;
55} lpc_i2s;
56
57/**
58 * @name I2S Digital Audio Input and Output
59 *
60 * @{
61 */
62
63#define I2S_DAIO_WORDWIDTH(val) BSP_FLD32(val, 0, 1)
64#define I2S_DAIO_MONO BSP_BIT32(2)
65#define I2S_DAIO_STOP BSP_BIT32(3)
66#define I2S_DAIO_RESET BSP_BIT32(4)
67#define I2S_DAIO_WS_SEL BSP_BIT32(5)
68#define I2S_DAIO_WS_HALFPERIOD(val) BSP_FLD32(val, 6, 14)
69#define I2S_DAIO_MUTE BSP_BIT32(15)
70
71/** @} */
72
73/**
74 * @name I2S Status Feedback
75 *
76 * @{
77 */
78
79#define I2S_STATE_IRQ BSP_BIT32(0)
80#define I2S_STATE_DMAREQ_0 BSP_BIT32(1)
81#define I2S_STATE_DMAREQ_1 BSP_BIT32(2)
82#define I2S_STATE_RX_LEVEL_GET(reg) BSP_FLD32GET(reg, 8, 11)
83#define I2S_STATE_TX_LEVEL_GET(reg) BSP_FLD32GET(reg, 16, 19)
84
85/** @} */
86
87/**
88 * @name I2S DMA Configuration
89 *
90 * @{
91 */
92
93#define I2S_DMA_RX_ENABLE BSP_BIT32(0)
94#define I2S_DMA_TX_ENABLE BSP_BIT32(1)
95#define I2S_DMA_RX_DEPTH(val) BSP_FLD32(val, 8, 11)
96#define I2S_DMA_TX_DEPTH(val) BSP_FLD32(val, 16, 19)
97
98/** @} */
99
100/**
101 * @name I2S Interrupt Request Control
102 *
103 * @{
104 */
105
106#define I2S_IRQ_RX BSP_BIT32(0)
107#define I2S_IRQ_TX BSP_BIT32(1)
108#define I2S_IRQ_RX_DEPTH(val) BSP_FLD32(val, 8, 11)
109#define I2S_IRQ_TX_DEPTH(val) BSP_FLD32(val, 16, 19)
110
111/** @} */
112
113/**
114 * @name I2S Transmit and Receive Clock Rate
115 *
116 * @{
117 */
118
119#define LPC24XX_I2S_RATE(val) BSP_FLD32(val, 0, 9)
120#define LPC32XX_I2S_RATE_X_DIVIDER BSP_FLD32(val, 0, 7)
121#define LPC32XX_I2S_RATE_Y_DIVIDER BSP_FLD32(val, 8, 15)
122
123/** @} */
124
125/** @} */
126
127#ifdef __cplusplus
128}
129#endif /* __cplusplus */
130
131#endif /* LIBBSP_ARM_SHARED_LPC_I2S_H */
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