[c468f18b] | 1 | /** |
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| 2 | * @file |
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| 3 | * |
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| 4 | * @ingroup lpc |
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| 5 | * |
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| 6 | * @brief Clock driver configuration. |
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| 7 | */ |
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| 8 | |
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| 9 | /* |
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| 10 | * Copyright (c) 2009 |
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| 11 | * embedded brains GmbH |
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| 12 | * Obere Lagerstr. 30 |
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| 13 | * D-82178 Puchheim |
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| 14 | * Germany |
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| 15 | * <rtems@embedded-brains.de> |
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| 16 | * |
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| 17 | * The license and distribution terms for this file may be |
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| 18 | * found in the file LICENSE in this distribution or at |
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| 19 | * http://www.rtems.com/license/LICENSE. |
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| 20 | */ |
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| 21 | |
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| 22 | #include <bsp/lpc-clock-config.h> |
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| 23 | #include <bsp/lpc-timer.h> |
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| 24 | |
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| 25 | /* This is defined in ../../../shared/clockdrv_shell.h */ |
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| 26 | rtems_isr Clock_isr(rtems_vector_number vector); |
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| 27 | |
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| 28 | static volatile lpc_timer *const lpc_clock = |
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| 29 | (volatile lpc_timer *) LPC_CLOCK_TIMER_BASE; |
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| 30 | |
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| 31 | static void lpc_clock_at_tick(void) |
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| 32 | { |
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| 33 | lpc_clock->ir = LPC_TIMER_IR_MR0; |
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| 34 | } |
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| 35 | |
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| 36 | static void lpc_clock_handler_install(void) |
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| 37 | { |
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| 38 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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| 39 | |
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| 40 | sc = rtems_interrupt_handler_install( |
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| 41 | LPC_CLOCK_INTERRUPT, |
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| 42 | "Clock", |
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| 43 | RTEMS_INTERRUPT_UNIQUE, |
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| 44 | (rtems_interrupt_handler) Clock_isr, |
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| 45 | NULL |
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| 46 | ); |
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| 47 | if (sc != RTEMS_SUCCESSFUL) { |
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| 48 | rtems_fatal_error_occurred(0xdeadbeef); |
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| 49 | } |
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| 50 | } |
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| 51 | |
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| 52 | static void lpc_clock_initialize(void) |
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| 53 | { |
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| 54 | uint64_t interval = ((uint64_t) LPC_CLOCK_REFERENCE |
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| 55 | * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000; |
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| 56 | |
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| 57 | /* Enable module */ |
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| 58 | LPC_CLOCK_MODULE_ENABLE(); |
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| 59 | |
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| 60 | /* Reset timer */ |
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| 61 | lpc_clock->tcr = LPC_TIMER_TCR_RST; |
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| 62 | |
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| 63 | /* Clear interrupt flags */ |
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| 64 | lpc_clock->ir = LPC_TIMER_IR_ALL; |
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| 65 | |
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| 66 | /* Set timer mode */ |
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| 67 | lpc_clock->ccr = 0; |
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| 68 | |
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| 69 | /* Timer is incremented every PERIPH_CLK tick */ |
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| 70 | lpc_clock->pr = 0; |
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| 71 | |
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| 72 | /* Set match registers */ |
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| 73 | lpc_clock->mr0 = (uint32_t) interval; |
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| 74 | |
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| 75 | /* Generate interrupt and reset counter on match with MR0 */ |
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| 76 | lpc_clock->mcr = LPC_TIMER_MCR_MR0_INTR | LPC_TIMER_MCR_MR0_RST; |
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| 77 | |
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| 78 | /* No external match */ |
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| 79 | lpc_clock->emr = 0x0; |
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| 80 | |
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| 81 | /* Enable timer */ |
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| 82 | lpc_clock->tcr = LPC_TIMER_TCR_EN; |
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| 83 | } |
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| 84 | |
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| 85 | static void lpc_clock_cleanup(void) |
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| 86 | { |
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| 87 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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| 88 | |
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| 89 | /* Disable timer */ |
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| 90 | lpc_clock->tcr = 0x0; |
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| 91 | |
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| 92 | /* Remove interrupt handler */ |
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| 93 | sc = rtems_interrupt_handler_remove( |
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| 94 | LPC_CLOCK_INTERRUPT, |
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| 95 | (rtems_interrupt_handler) Clock_isr, |
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| 96 | NULL |
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| 97 | ); |
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| 98 | if (sc != RTEMS_SUCCESSFUL) { |
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| 99 | rtems_fatal_error_occurred(0xdeadbeef); |
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| 100 | } |
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| 101 | } |
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| 102 | |
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| 103 | static uint32_t lpc_clock_nanoseconds_since_last_tick(void) |
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| 104 | { |
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| 105 | uint64_t clock = LPC_CLOCK_REFERENCE; |
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| 106 | uint64_t clicks = lpc_clock->tc; |
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| 107 | uint64_t ns = (clicks * 1000000000) / clock; |
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| 108 | |
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| 109 | return (uint32_t) ns; |
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| 110 | } |
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| 111 | |
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| 112 | #define Clock_driver_support_at_tick() lpc_clock_at_tick() |
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| 113 | #define Clock_driver_support_initialize_hardware() lpc_clock_initialize() |
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| 114 | #define Clock_driver_support_install_isr(isr, old_isr) \ |
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| 115 | lpc_clock_handler_install() |
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| 116 | #define Clock_driver_support_shutdown_hardware() lpc_clock_cleanup() |
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| 117 | #define Clock_driver_nanoseconds_since_last_tick \ |
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| 118 | lpc_clock_nanoseconds_since_last_tick |
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| 119 | |
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| 120 | /* Include shared source clock driver code */ |
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| 121 | #include "../../../../shared/clockdrv_shell.h" |
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