source: rtems/c/src/lib/libbsp/arm/shared/irq/irq_asm.S @ 08330bf

4.104.114.84.95
Last change on this file since 08330bf was 08330bf, checked in by Joel Sherrill <joel.sherrill@…>, on 07/27/00 at 01:04:11

Port of RTEMS to the ARM processor family by Eric Valette
<valette@…> and Emmanuel Raguet <raguet@…>
of Canon CRF - Communication Dept. This port includes a
basic BSP that is sufficient to link hello world.

  • Property mode set to 100644
File size: 2.9 KB
Line 
1/* irq_asm.S
2 *
3 *  This file contains the implementation of the IRQ handler
4 *
5 *  CopyRight (C) 2000 Canon Research France SA.
6 *  Emmanuel Raguet,  mailto:raguet@crf.canon.fr
7 *
8 *  The license and distribution terms for this file may be
9 *  found in found in the file LICENSE in this distribution or at
10 *  http://www.OARcorp.com/rtems/license.html.
11 *
12 *  $Id$
13 */
14
15#include "asm.h"
16#define __asm__
17#include <registers.h>
18
19
20/*
21 * WARNING :    register r5 is important. If you need to use it,
22 *              to forget to save it !!!!!!!!!!
23 */
24       
25        .globl _ISR_Handler
26_ISR_Handler:   
27        stmdb   sp!, {r4,r5,lr}                 /* save regs on INT stack */
28        mrs     r4, cpsr                        /* save current CSPR */
29        mov     r5, r4                          /* copy CSPR */
30        orr     r4, r4, #3
31        msr     cpsr, r4                        /* switch to SVC mode */
32       
33        stmdb   sp!, {r0-r3,r12,r14}            /* save scratch regs on SVC stack */
34
35        msr     cpsr, r5                        /* switch back to INT mode */
36
37        ldr     r0, =_ISR_Nest_level             /* one nest level deeper */
38        ldr     r1, [r0]
39        add     r1, r1,#1
40        str     r1, [r0]
41       
42        ldr     r0, =_Thread_Dispatch_disable_level          /* disable multitasking */
43        ldr     r1, [r0]
44        add     r1, r1,#1
45        str     r1, [r0]
46
47        b       ExecuteITHandler                /* BSP specific function to INT handler */
48
49        .globl  ReturnFromHandler
50ReturnFromHandler :     
51        ldr     r0, =_ISR_Nest_level                    /* one less nest level  */
52        ldr     r1, [r0]
53        sub     r1, r1,#1
54        str     r1, [r0]
55       
56        ldr     r0, =_Thread_Dispatch_disable_level     /* unnest multitasking */
57        ldr     r1, [r0]
58        sub     r1, r1,#1
59        str     r1, [r0]
60
61        cmp     r1, #0                   /* is dispatch enabled */
62        bne     exitit                     /* Yes, then exit */
63
64        ldr     r0, =_Context_Switch_necessary  /* task switch necessary ? */
65        ldr     r1, [r0]
66        cmp     r1, #0
67        bne     schedule                        /* yes, call scheduler */
68       
69        ldr     r0, =_ISR_Signals_to_thread_executing   
70        ldr     r1, [r0]                /* signals sent to Run_thread */
71        cmp     r1, #0                  /*     while in interrupt handler ? */
72        beq     exitit                  /* No, exit */
73       
74bframe:
75        mov     r1, #0       /* _ISR_Signals_to_thread_executing = FALSE */
76        str     r1, [r0]
77        /*
78         * At this point, we need a complete exception context for the
79         * current thread. We need to complete the interrupt exception
80         * with the "not-yet-saved" registers
81         */
82        /*
83         * currently exception context = interrupt handler
84         * it needs to be optimized
85         */
86        bl      _ThreadProcessSignalsFromIrq
87        b       exitit
88                               
89schedule:
90        /*
91         * the scratch registers have already been saved and we are already
92         * back on the thread system stack. So we can call _Thread_Displatch
93         * directly
94         */
95        bl      _Thread_Dispatch
96        /*
97         * fall through exit to restore complete contex (scratch registers
98         * eip, CS, Flags).
99         */
100exitit:
101        b       AckControler            /* BSP specific function to ack PIC */
102
103        .globl ReturnFromAck
104ReturnFromAck :
105        ldmia   sp!, {r0-r3,r12,r14}    /* restore regs from SVC stack */
106        msr     cpsr, r5                /* switch back to INT mode */
107        ldmia   sp!, {r4,r5,lr}         /* restore regs from INT stack */               
108        subs    pc,r14,#4               /* return */
109       
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