source: rtems/c/src/lib/libbsp/arm/shared/include/arm-gic-regs.h @ a91dc98b

4.115
Last change on this file since a91dc98b was a91dc98b, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 26, 2013 at 1:06:32 PM

bsp/realview-pbx-a9: New BSP

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File size: 6.3 KB
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1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#ifndef LIBBSP_ARM_SHARED_ARM_GIC_REGS_H
16#define LIBBSP_ARM_SHARED_ARM_GIC_REGS_H
17
18#include <bsp/utility.h>
19
20typedef struct {
21  uint32_t iccicr;
22#define GIC_CPUIF_ICCICR_ENABLE BSP_BIT32(0)
23  uint32_t iccpmr;
24#define GIC_CPUIF_ICCPMR_PRIORITY(val) BSP_FLD32(val, 0, 7)
25#define GIC_CPUIF_ICCPMR_PRIORITY_GET(reg) BSP_FLD32GET(reg, 0, 7)
26#define GIC_CPUIF_ICCPMR_PRIORITY_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
27  uint32_t iccbpr;
28#define GIC_CPUIF_ICCBPR_BINARY_POINT(val) BSP_FLD32(val, 0, 2)
29#define GIC_CPUIF_ICCBPR_BINARY_POINT_GET(reg) BSP_FLD32GET(reg, 0, 2)
30#define GIC_CPUIF_ICCBPR_BINARY_POINT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2)
31  uint32_t icciar;
32#define GIC_CPUIF_ICCIAR_CPUID(val) BSP_FLD32(val, 10, 12)
33#define GIC_CPUIF_ICCIAR_CPUID_GET(reg) BSP_FLD32GET(reg, 10, 12)
34#define GIC_CPUIF_ICCIAR_CPUID_SET(reg, val) BSP_FLD32SET(reg, val, 10, 12)
35#define GIC_CPUIF_ICCIAR_ACKINTID(val) BSP_FLD32(val, 0, 9)
36#define GIC_CPUIF_ICCIAR_ACKINTID_GET(reg) BSP_FLD32GET(reg, 0, 9)
37#define GIC_CPUIF_ICCIAR_ACKINTID_SET(reg, val) BSP_FLD32SET(reg, val, 0, 9)
38  uint32_t icceoir;
39#define GIC_CPUIF_ICCEOIR_CPUID(val) BSP_FLD32(val, 10, 12)
40#define GIC_CPUIF_ICCEOIR_CPUID_GET(reg) BSP_FLD32GET(reg, 10, 12)
41#define GIC_CPUIF_ICCEOIR_CPUID_SET(reg, val) BSP_FLD32SET(reg, val, 10, 12)
42#define GIC_CPUIF_ICCEOIR_EOIINTID(val) BSP_FLD32(val, 0, 9)
43#define GIC_CPUIF_ICCEOIR_EOIINTID_GET(reg) BSP_FLD32GET(reg, 0, 9)
44#define GIC_CPUIF_ICCEOIR_EOIINTID_SET(reg, val) BSP_FLD32SET(reg, val, 0, 9)
45  uint32_t iccrpr;
46#define GIC_CPUIF_ICCRPR_PRIORITY(val) BSP_FLD32(val, 0, 7)
47#define GIC_CPUIF_ICCRPR_PRIORITY_GET(reg) BSP_FLD32GET(reg, 0, 7)
48#define GIC_CPUIF_ICCRPR_PRIORITY_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
49  uint32_t icchpir;
50#define GIC_CPUIF_ICCHPIR_CPUID(val) BSP_FLD32(val, 10, 12)
51#define GIC_CPUIF_ICCHPIR_CPUID_GET(reg) BSP_FLD32GET(reg, 10, 12)
52#define GIC_CPUIF_ICCHPIR_CPUID_SET(reg, val) BSP_FLD32SET(reg, val, 10, 12)
53#define GIC_CPUIF_ICCHPIR_PENDINTID(val) BSP_FLD32(val, 0, 9)
54#define GIC_CPUIF_ICCHPIR_PENDINTID_GET(reg) BSP_FLD32GET(reg, 0, 9)
55#define GIC_CPUIF_ICCHPIR_PENDINTID_SET(reg, val) BSP_FLD32SET(reg, val, 0, 9)
56  uint32_t iccabpr;
57#define GIC_CPUIF_ICCABPR_BINARY_POINT(val) BSP_FLD32(val, 0, 2)
58#define GIC_CPUIF_ICCABPR_BINARY_POINT_GET(reg) BSP_FLD32GET(reg, 0, 2)
59#define GIC_CPUIF_ICCABPR_BINARY_POINT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2)
60  uint32_t reserved_20[55];
61  uint32_t icciidr;
62#define GIC_CPUIF_ICCIIDR_PRODUCT_ID(val) BSP_FLD32(val, 24, 31)
63#define GIC_CPUIF_ICCIIDR_PRODUCT_ID_GET(reg) BSP_FLD32GET(reg, 24, 31)
64#define GIC_CPUIF_ICCIIDR_PRODUCT_ID_SET(reg, val) BSP_FLD32SET(reg, val, 24, 31)
65#define GIC_CPUIF_ICCIIDR_ARCH_VERSION(val) BSP_FLD32(val, 16, 19)
66#define GIC_CPUIF_ICCIIDR_ARCH_VERSION_GET(reg) BSP_FLD32GET(reg, 16, 19)
67#define GIC_CPUIF_ICCIIDR_ARCH_VERSION_SET(reg, val) BSP_FLD32SET(reg, val, 16, 19)
68#define GIC_CPUIF_ICCIIDR_REVISION(val) BSP_FLD32(val, 12, 15)
69#define GIC_CPUIF_ICCIIDR_REVISION_GET(reg) BSP_FLD32GET(reg, 12, 15)
70#define GIC_CPUIF_ICCIIDR_REVISION_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
71#define GIC_CPUIF_ICCIIDR_IMPLEMENTER(val) BSP_FLD32(val, 0, 11)
72#define GIC_CPUIF_ICCIIDR_IMPLEMENTER_GET(reg) BSP_FLD32GET(reg, 0, 11)
73#define GIC_CPUIF_ICCIIDR_IMPLEMENTER_SET(reg, val) BSP_FLD32SET(reg, val, 0, 11)
74} gic_cpuif;
75
76typedef struct {
77  uint32_t icddcr;
78#define GIC_DIST_ICDDCR_ENABLE BSP_BIT32(0)
79  uint32_t icdictr;
80#define GIC_DIST_ICDICTR_LSPI(val) BSP_FLD32(val, 11, 15)
81#define GIC_DIST_ICDICTR_LSPI_GET(reg) BSP_FLD32GET(reg, 11, 15)
82#define GIC_DIST_ICDICTR_LSPI_SET(reg, val) BSP_FLD32SET(reg, val, 11, 15)
83#define GIC_DIST_ICDICTR_SECURITY_EXTN BSP_BIT32(10)
84#define GIC_DIST_ICDICTR_CPU_NUMBER(val) BSP_FLD32(val, 5, 7)
85#define GIC_DIST_ICDICTR_CPU_NUMBER_GET(reg) BSP_FLD32GET(reg, 5, 7)
86#define GIC_DIST_ICDICTR_CPU_NUMBER_SET(reg, val) BSP_FLD32SET(reg, val, 5, 7)
87#define GIC_DIST_ICDICTR_IT_LINES_NUMBER(val) BSP_FLD32(val, 0, 4)
88#define GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(reg) BSP_FLD32GET(reg, 0, 4)
89#define GIC_DIST_ICDICTR_IT_LINES_NUMBER_SET(reg, val) BSP_FLD32SET(reg, val, 0, 4)
90  uint32_t icdiidr;
91#define GIC_DIST_ICDIIDR_PRODUCT_ID(val) BSP_FLD32(val, 24, 31)
92#define GIC_DIST_ICDIIDR_PRODUCT_ID_GET(reg) BSP_FLD32GET(reg, 24, 31)
93#define GIC_DIST_ICDIIDR_PRODUCT_ID_SET(reg, val) BSP_FLD32SET(reg, val, 24, 31)
94#define GIC_DIST_ICDIIDR_VARIANT(val) BSP_FLD32(val, 16, 19)
95#define GIC_DIST_ICDIIDR_VARIANT_GET(reg) BSP_FLD32GET(reg, 16, 19)
96#define GIC_DIST_ICDIIDR_VARIANT_SET(reg, val) BSP_FLD32SET(reg, val, 16, 19)
97#define GIC_DIST_ICDIIDR_REVISION(val) BSP_FLD32(val, 12, 15)
98#define GIC_DIST_ICDIIDR_REVISION_GET(reg) BSP_FLD32GET(reg, 12, 15)
99#define GIC_DIST_ICDIIDR_REVISION_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
100#define GIC_DIST_ICDIIDR_IMPLEMENTER(val) BSP_FLD32(val, 0, 11)
101#define GIC_DIST_ICDIIDR_IMPLEMENTER_GET(reg) BSP_FLD32GET(reg, 0, 11)
102#define GIC_DIST_ICDIIDR_IMPLEMENTER_SET(reg, val) BSP_FLD32SET(reg, val, 0, 11)
103  uint32_t reserved_0c[29];
104  uint32_t icdisr[32];
105  uint32_t icdiser[32];
106  uint32_t icdicer[32];
107  uint32_t icdispr[32];
108  uint32_t icdicpr[32];
109  uint32_t icdabr[32];
110  uint32_t reserved_380[32];
111  uint8_t icdipr[256];
112  uint32_t reserved_500[192];
113  uint8_t icdiptr[256];
114  uint32_t reserved_900[192];
115  uint32_t icdicfr[64];
116  uint32_t reserved_d00[128];
117  uint32_t icdsgir;
118#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(val) BSP_FLD32(val, 24, 25)
119#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_GET(reg) BSP_FLD32GET(reg, 24, 25)
120#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_SET(reg, val) BSP_FLD32SET(reg, val, 24, 25)
121#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST(val) BSP_FLD32(val, 16, 23)
122#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST_GET(reg) BSP_FLD32GET(reg, 16, 23)
123#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST_SET(reg, val) BSP_FLD32SET(reg, val, 16, 23)
124#define GIC_DIST_ICDSGIR_SATT BSP_BIT32(15)
125#define GIC_DIST_ICDSGIR_SGIINTID(val) BSP_FLD32(val, 0, 3)
126#define GIC_DIST_ICDSGIR_SGIINTID_GET(reg) BSP_FLD32GET(reg, 0, 3)
127#define GIC_DIST_ICDSGIR_SGIINTID_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
128} gic_dist;
129
130#endif /* LIBBSP_ARM_SHARED_ARM_GIC_REGS_H */
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