source: rtems/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h @ cbc433c7

4.11
Last change on this file since cbc433c7 was cbc433c7, checked in by Sebastian Huber <sebastian.huber@…>, on Nov 25, 2014 at 7:40:20 AM

bsps/arm: Add .nocache section

This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup arm_start
5 *
6 * @brief Arm CP15 start.
7 */
8
9
10/*
11 * Copyright (c) 2013 Hesham AL-Matary.
12 * Copyright (c) 2009-2014 embedded brains GmbH.  All rights reserved.
13 *
14 *  embedded brains GmbH
15 *  Dornierstr. 4
16 *  82178 Puchheim
17 *  Germany
18 *  <info@embedded-brains.de>
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.org/license/LICENSE.
23 */
24
25#ifndef LIBBSP_ARM_SHARED_ARM_CP15_START_H
26#define LIBBSP_ARM_SHARED_ARM_CP15_START_H
27
28#include <libcpu/arm-cp15.h>
29#include <bsp/start.h>
30#include <bsp/linker-symbols.h>
31
32#ifdef __cplusplus
33extern "C" {
34#endif /* __cplusplus */
35
36typedef struct {
37  uint32_t begin;
38  uint32_t end;
39  uint32_t flags;
40} arm_cp15_start_section_config;
41
42#define ARMV7_CP15_START_DEFAULT_SECTIONS \
43  { \
44    .begin = (uint32_t) bsp_section_fast_text_begin, \
45    .end = (uint32_t) bsp_section_fast_text_end, \
46    .flags = ARMV7_MMU_CODE_CACHED \
47  }, { \
48    .begin = (uint32_t) bsp_section_fast_data_begin, \
49    .end = (uint32_t) bsp_section_fast_data_end, \
50    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
51  }, { \
52    .begin = (uint32_t) bsp_section_start_begin, \
53    .end = (uint32_t) bsp_section_start_end, \
54    .flags = ARMV7_MMU_CODE_CACHED \
55  }, { \
56    .begin = (uint32_t) bsp_section_vector_begin, \
57    .end = (uint32_t) bsp_section_vector_end, \
58    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
59  }, { \
60    .begin = (uint32_t) bsp_section_text_begin, \
61    .end = (uint32_t) bsp_section_text_end, \
62    .flags = ARMV7_MMU_CODE_CACHED \
63  }, { \
64    .begin = (uint32_t) bsp_section_rodata_begin, \
65    .end = (uint32_t) bsp_section_rodata_end, \
66    .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED \
67  }, { \
68    .begin = (uint32_t) bsp_section_data_begin, \
69    .end = (uint32_t) bsp_section_data_end, \
70    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
71  }, { \
72    .begin = (uint32_t) bsp_section_bss_begin, \
73    .end = (uint32_t) bsp_section_bss_end, \
74    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
75  }, { \
76    .begin = (uint32_t) bsp_section_work_begin, \
77    .end = (uint32_t) bsp_section_work_end, \
78    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
79  }, { \
80    .begin = (uint32_t) bsp_section_stack_begin, \
81    .end = (uint32_t) bsp_section_stack_end, \
82    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
83  }, { \
84    .begin = (uint32_t) bsp_section_nocache_begin, \
85    .end = (uint32_t) bsp_section_nocache_end, \
86    .flags = ARMV7_MMU_DEVICE \
87  }
88
89BSP_START_DATA_SECTION extern const arm_cp15_start_section_config
90  arm_cp15_start_mmu_config_table[];
91
92BSP_START_DATA_SECTION extern const size_t
93  arm_cp15_start_mmu_config_table_size;
94
95BSP_START_TEXT_SECTION static inline void
96arm_cp15_start_set_translation_table_entries(
97  uint32_t *ttb,
98  const arm_cp15_start_section_config *config
99)
100{
101  uint32_t i = ARM_MMU_SECT_GET_INDEX(config->begin);
102  uint32_t iend =
103    ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
104  uint32_t index_mask = (1U << (32 - ARM_MMU_SECT_BASE_SHIFT)) - 1U;
105
106  if (config->begin != config->end) {
107    while (i != iend) {
108      ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | config->flags;
109      i = (i + 1U) & index_mask;
110    }
111  }
112}
113
114BSP_START_TEXT_SECTION static inline void
115arm_cp15_start_setup_translation_table(
116  uint32_t *ttb,
117  uint32_t client_domain,
118  const arm_cp15_start_section_config *config_table,
119  size_t config_count
120)
121{
122  uint32_t dac = ARM_CP15_DAC_DOMAIN(client_domain, ARM_CP15_DAC_CLIENT);
123  size_t i;
124
125  arm_cp15_set_domain_access_control(dac);
126  arm_cp15_set_translation_table_base(ttb);
127
128  /* Initialize translation table with invalid entries */
129  for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
130    ttb [i] = 0;
131  }
132
133  for (i = 0; i < config_count; ++i) {
134    arm_cp15_start_set_translation_table_entries(ttb, &config_table [i]);
135  }
136}
137
138BSP_START_TEXT_SECTION static inline void
139arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
140  uint32_t ctrl,
141  uint32_t *ttb,
142  uint32_t client_domain,
143  const arm_cp15_start_section_config *config_table,
144  size_t config_count
145)
146{
147  arm_cp15_start_setup_translation_table(
148    ttb,
149    client_domain,
150    config_table,
151    config_count
152  );
153
154  /* Enable MMU and cache */
155  ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
156
157  arm_cp15_set_control(ctrl);
158}
159
160BSP_START_TEXT_SECTION static inline uint32_t
161arm_cp15_start_setup_mmu_and_cache(uint32_t ctrl_clear, uint32_t ctrl_set)
162{
163  uint32_t ctrl = arm_cp15_get_control();
164
165  ctrl &= ~ctrl_clear;
166  ctrl |= ctrl_set;
167
168  arm_cp15_set_control(ctrl);
169
170  arm_cp15_tlb_invalidate();
171
172  return ctrl;
173}
174
175#ifdef __cplusplus
176}
177#endif /* __cplusplus */
178
179#endif /* LIBBSP_ARM_SHARED_ARM_CP15_START_H */
Note: See TracBrowser for help on using the repository browser.