source: rtems/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h @ 2d6543d4

4.115
Last change on this file since 2d6543d4 was 2d6543d4, checked in by Daniel Ramirez <javamonn@…>, on Nov 30, 2013 at 2:18:44 AM

doxygen: refactored doxygen in libbsp/arm/lpc32xx

This patch refactors a lot of the existing doxygen within libbsp/arm/lpc32xx.
Much of this refactoring was just renaming of existing groups to conform to a
more consistent naming structure. With the addition of a doxygen header for
tm27.h, all files within lpc32xx belong to doxygen group now. lpc32xx should
be used a reference for adding doxygen to other bsps.

  • Property mode set to 100644
File size: 4.8 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup arm_start
5 *
6 * @brief Arm CP15 start.
7 */
8
9
10/*
11 * Copyright (c) 2013 Hesham AL-Matary.
12 * Copyright (c) 2009-2013 embedded brains GmbH.  All rights reserved.
13 *
14 *  embedded brains GmbH
15 *  Dornierstr. 4
16 *  82178 Puchheim
17 *  Germany
18 *  <info@embedded-brains.de>
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.com/license/LICENSE.
23 */
24
25#ifndef LIBBSP_ARM_SHARED_ARM_CP15_START_H
26#define LIBBSP_ARM_SHARED_ARM_CP15_START_H
27
28#include <libcpu/arm-cp15.h>
29#include <bsp/start.h>
30#include <bsp/linker-symbols.h>
31
32#ifdef __cplusplus
33extern "C" {
34#endif /* __cplusplus */
35
36typedef struct {
37  uint32_t begin;
38  uint32_t end;
39  uint32_t flags;
40} arm_cp15_start_section_config;
41
42#define ARMV7_CP15_START_DEFAULT_SECTIONS \
43  { \
44    .begin = (uint32_t) bsp_section_fast_text_begin, \
45    .end = (uint32_t) bsp_section_fast_text_end, \
46    .flags = ARMV7_MMU_CODE_CACHED \
47  }, { \
48    .begin = (uint32_t) bsp_section_fast_data_begin, \
49    .end = (uint32_t) bsp_section_fast_data_end, \
50    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
51  }, { \
52    .begin = (uint32_t) bsp_section_start_begin, \
53    .end = (uint32_t) bsp_section_start_end, \
54    .flags = ARMV7_MMU_CODE_CACHED \
55  }, { \
56    .begin = (uint32_t) bsp_section_vector_begin, \
57    .end = (uint32_t) bsp_section_vector_end, \
58    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
59  }, { \
60    .begin = (uint32_t) bsp_section_text_begin, \
61    .end = (uint32_t) bsp_section_text_end, \
62    .flags = ARMV7_MMU_CODE_CACHED \
63  }, { \
64    .begin = (uint32_t) bsp_section_rodata_begin, \
65    .end = (uint32_t) bsp_section_rodata_end, \
66    .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED \
67  }, { \
68    .begin = (uint32_t) bsp_section_data_begin, \
69    .end = (uint32_t) bsp_section_data_end, \
70    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
71  }, { \
72    .begin = (uint32_t) bsp_section_bss_begin, \
73    .end = (uint32_t) bsp_section_bss_end, \
74    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
75  }, { \
76    .begin = (uint32_t) bsp_section_work_begin, \
77    .end = (uint32_t) bsp_section_work_end, \
78    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
79  }, { \
80    .begin = (uint32_t) bsp_section_stack_begin, \
81    .end = (uint32_t) bsp_section_stack_end, \
82    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
83  }
84
85extern const arm_cp15_start_section_config bsp_mm_config_table[];
86extern const size_t bsp_mm_config_table_size;
87
88BSP_START_TEXT_SECTION static inline void
89arm_cp15_set_domain_access_control(uint32_t val);
90
91BSP_START_TEXT_SECTION static inline void
92arm_cp15_set_translation_table_base(uint32_t *base);
93
94BSP_START_TEXT_SECTION static inline void
95arm_cp15_set_control(uint32_t val);
96
97BSP_START_TEXT_SECTION static inline uint32_t
98arm_cp15_get_control(void);
99
100BSP_START_TEXT_SECTION static inline void
101arm_cp15_cache_invalidate(void);
102
103BSP_START_TEXT_SECTION static inline void
104arm_cp15_tlb_invalidate(void);
105
106BSP_START_TEXT_SECTION static inline uint32_t
107arm_cp15_get_multiprocessor_affinity(void);
108
109BSP_START_TEXT_SECTION static inline uint32_t
110arm_cortex_a9_get_multiprocessor_cpu_id(void);
111
112BSP_START_TEXT_SECTION static inline void
113arm_cp15_start_set_translation_table_entries(
114  uint32_t *ttb,
115  const arm_cp15_start_section_config *config
116)
117{
118  uint32_t i = ARM_MMU_SECT_GET_INDEX(config->begin);
119  uint32_t iend =
120    ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
121  uint32_t index_mask = (1U << (32 - ARM_MMU_SECT_BASE_SHIFT)) - 1U;
122
123  if (config->begin != config->end) {
124    while (i != iend) {
125      ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | config->flags;
126      i = (i + 1U) & index_mask;
127    }
128  }
129}
130
131BSP_START_TEXT_SECTION static inline void
132arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
133  uint32_t ctrl,
134  uint32_t *ttb,
135  uint32_t client_domain,
136  const arm_cp15_start_section_config *config_table,
137  size_t config_count
138)
139{
140  uint32_t dac = ARM_CP15_DAC_DOMAIN(client_domain, ARM_CP15_DAC_CLIENT);
141  size_t i;
142
143  arm_cp15_set_domain_access_control(dac);
144  arm_cp15_set_translation_table_base(ttb);
145
146  /* Initialize translation table with invalid entries */
147  for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
148    ttb [i] = 0;
149  }
150
151  for (i = 0; i < config_count; ++i) {
152    arm_cp15_start_set_translation_table_entries(ttb, &config_table [i]);
153  }
154
155  /* Enable MMU and cache */
156  ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
157
158  arm_cp15_set_control(ctrl);
159}
160
161BSP_START_TEXT_SECTION static inline uint32_t
162arm_cp15_start_setup_mmu_and_cache(uint32_t ctrl_clear, uint32_t ctrl_set)
163{
164  uint32_t ctrl = arm_cp15_get_control();
165
166  ctrl &= ~ctrl_clear;
167  ctrl |= ctrl_set;
168
169  arm_cp15_set_control(ctrl);
170
171  arm_cp15_tlb_invalidate();
172
173  return ctrl;
174}
175
176#ifdef __cplusplus
177}
178#endif /* __cplusplus */
179
180#endif /* LIBBSP_ARM_SHARED_ARM_CP15_START_H */
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