source: rtems/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h @ 197d034

4.11
Last change on this file since 197d034 was 197d034, checked in by Chris Johns <chrisj@…>, on Aug 9, 2016 at 7:05:27 AM

libbsp/arm: Add the TTB table to the default MMU set up as read/write.

This lets the table be changed at runtime for dynamic loading and
debugger support.

Closes #2775.

  • Property mode set to 100644
File size: 4.8 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup arm_start
5 *
6 * @brief Arm CP15 start.
7 */
8
9
10/*
11 * Copyright (c) 2013 Hesham AL-Matary.
12 * Copyright (c) 2009-2014 embedded brains GmbH.  All rights reserved.
13 *
14 *  embedded brains GmbH
15 *  Dornierstr. 4
16 *  82178 Puchheim
17 *  Germany
18 *  <info@embedded-brains.de>
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.org/license/LICENSE.
23 */
24
25#ifndef LIBBSP_ARM_SHARED_ARM_CP15_START_H
26#define LIBBSP_ARM_SHARED_ARM_CP15_START_H
27
28#include <libcpu/arm-cp15.h>
29#include <bsp/start.h>
30#include <bsp/linker-symbols.h>
31
32#ifdef __cplusplus
33extern "C" {
34#endif /* __cplusplus */
35
36typedef struct {
37  uint32_t begin;
38  uint32_t end;
39  uint32_t flags;
40} arm_cp15_start_section_config;
41
42#define ARMV7_CP15_START_DEFAULT_SECTIONS \
43  { \
44    .begin = (uint32_t) bsp_section_fast_text_begin, \
45    .end = (uint32_t) bsp_section_fast_text_end, \
46    .flags = ARMV7_MMU_CODE_CACHED \
47  }, { \
48    .begin = (uint32_t) bsp_section_fast_data_begin, \
49    .end = (uint32_t) bsp_section_fast_data_end, \
50    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
51  }, { \
52    .begin = (uint32_t) bsp_section_start_begin, \
53    .end = (uint32_t) bsp_section_start_end, \
54    .flags = ARMV7_MMU_CODE_CACHED \
55  }, { \
56    .begin = (uint32_t) bsp_section_vector_begin, \
57    .end = (uint32_t) bsp_section_vector_end, \
58    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
59  }, { \
60    .begin = (uint32_t) bsp_section_text_begin, \
61    .end = (uint32_t) bsp_section_text_end, \
62    .flags = ARMV7_MMU_CODE_CACHED \
63  }, { \
64    .begin = (uint32_t) bsp_section_rodata_begin, \
65    .end = (uint32_t) bsp_section_rodata_end, \
66    .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED \
67  }, { \
68    .begin = (uint32_t) bsp_section_data_begin, \
69    .end = (uint32_t) bsp_section_data_end, \
70    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
71  }, { \
72    .begin = (uint32_t) bsp_section_bss_begin, \
73    .end = (uint32_t) bsp_section_bss_end, \
74    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
75  }, { \
76    .begin = (uint32_t) bsp_section_work_begin, \
77    .end = (uint32_t) bsp_section_work_end, \
78    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
79  }, { \
80    .begin = (uint32_t) bsp_section_stack_begin, \
81    .end = (uint32_t) bsp_section_stack_end, \
82    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
83  }, { \
84    .begin = (uint32_t) bsp_section_nocache_begin, \
85    .end = (uint32_t) bsp_section_nocache_end, \
86    .flags = ARMV7_MMU_DEVICE \
87  }, { \
88    .begin = (uint32_t) bsp_translation_table_base, \
89    .end = (uint32_t) bsp_translation_table_end, \
90    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
91  }
92
93BSP_START_DATA_SECTION extern const arm_cp15_start_section_config
94  arm_cp15_start_mmu_config_table[];
95
96BSP_START_DATA_SECTION extern const size_t
97  arm_cp15_start_mmu_config_table_size;
98
99BSP_START_TEXT_SECTION static inline void
100arm_cp15_start_set_translation_table_entries(
101  uint32_t *ttb,
102  const arm_cp15_start_section_config *config
103)
104{
105  uint32_t i = ARM_MMU_SECT_GET_INDEX(config->begin);
106  uint32_t iend =
107    ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
108  uint32_t index_mask = (1U << (32 - ARM_MMU_SECT_BASE_SHIFT)) - 1U;
109
110  if (config->begin != config->end) {
111    while (i != iend) {
112      ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | config->flags;
113      i = (i + 1U) & index_mask;
114    }
115  }
116}
117
118BSP_START_TEXT_SECTION static inline void
119arm_cp15_start_setup_translation_table(
120  uint32_t *ttb,
121  uint32_t client_domain,
122  const arm_cp15_start_section_config *config_table,
123  size_t config_count
124)
125{
126  uint32_t dac = ARM_CP15_DAC_DOMAIN(client_domain, ARM_CP15_DAC_CLIENT);
127  size_t i;
128
129  arm_cp15_set_domain_access_control(dac);
130  arm_cp15_set_translation_table_base(ttb);
131
132  /* Initialize translation table with invalid entries */
133  for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
134    ttb [i] = 0;
135  }
136
137  for (i = 0; i < config_count; ++i) {
138    arm_cp15_start_set_translation_table_entries(ttb, &config_table [i]);
139  }
140}
141
142BSP_START_TEXT_SECTION static inline void
143arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
144  uint32_t ctrl,
145  uint32_t *ttb,
146  uint32_t client_domain,
147  const arm_cp15_start_section_config *config_table,
148  size_t config_count
149)
150{
151  arm_cp15_start_setup_translation_table(
152    ttb,
153    client_domain,
154    config_table,
155    config_count
156  );
157
158  /* Enable MMU and cache */
159  ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
160
161  arm_cp15_set_control(ctrl);
162}
163
164BSP_START_TEXT_SECTION static inline uint32_t
165arm_cp15_start_setup_mmu_and_cache(uint32_t ctrl_clear, uint32_t ctrl_set)
166{
167  uint32_t ctrl = arm_cp15_get_control();
168
169  ctrl &= ~ctrl_clear;
170  ctrl |= ctrl_set;
171
172  arm_cp15_set_control(ctrl);
173
174  arm_cp15_tlb_invalidate();
175
176  return ctrl;
177}
178
179#ifdef __cplusplus
180}
181#endif /* __cplusplus */
182
183#endif /* LIBBSP_ARM_SHARED_ARM_CP15_START_H */
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