source: rtems/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h @ a91dc98b

4.115
Last change on this file since a91dc98b was a91dc98b, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 26, 2013 at 1:06:32 PM

bsp/realview-pbx-a9: New BSP

  • Property mode set to 100644
File size: 1.9 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#ifndef LIBBSP_ARM_SHARED_ARM_A9MPCORE_REGS_H
16#define LIBBSP_ARM_SHARED_ARM_A9MPCORE_REGS_H
17
18#include <bsp/utility.h>
19
20typedef struct {
21  uint32_t ctrl;
22  uint32_t cfg;
23  uint32_t pwrst;
24  uint32_t invss;
25  uint32_t reserved_10[12];
26  uint32_t fltstart;
27  uint32_t fltend;
28  uint32_t reserved_48[2];
29  uint32_t sac;
30  uint32_t snsac;
31} a9mpcore_scu;
32
33typedef struct {
34} a9mpcore_gic;
35
36typedef struct {
37  uint32_t cntr;
38  uint32_t reserved_04;
39  uint32_t ctrl;
40  uint32_t irqst;
41  uint32_t cmpval;
42  uint32_t reserved_14;
43  uint32_t autoinc;
44} a9mpcore_gt;
45
46typedef struct {
47  uint32_t load;
48  uint32_t cntr;
49  uint32_t ctrl;
50#define A9MPCORE_PT_CTRL_PRESCALER(val) BSP_FLD32(val, 8, 15)
51#define A9MPCORE_PT_CTRL_PRESCALER_GET(reg) BSP_FLD32GET(reg, 8, 15)
52#define A9MPCORE_PT_CTRL_PRESCALER_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
53#define A9MPCORE_PT_CTRL_IRQ_EN BSP_BIT32(2)
54#define A9MPCORE_PT_CTRL_AUTO_RLD BSP_BIT32(1)
55#define A9MPCORE_PT_CTRL_TMR_EN BSP_BIT32(0)
56  uint32_t irqst;
57#define A9MPCORE_PT_IRQST_EFLG BSP_BIT32(0)
58} a9mpcore_pt;
59
60typedef struct {
61  uint32_t load;
62  uint32_t cntr;
63  uint32_t ctrl;
64  uint32_t irqst;
65  uint32_t rstst;
66  uint32_t dis;
67} a9mpcore_pw;
68
69typedef struct {
70} a9mpcore_idist;
71
72typedef struct {
73  a9mpcore_scu scu;
74  uint32_t reserved_58[42];
75  a9mpcore_gic gic;
76  uint32_t reserved_100[64];
77  a9mpcore_gt gt;
78  uint32_t reserved_21c[249];
79  a9mpcore_pt pt;
80  uint32_t reserved_610[4];
81  a9mpcore_pw pw;
82  uint32_t reserved_638[626];
83  a9mpcore_idist idist;
84} a9mpcore;
85
86#endif /* LIBBSP_ARM_SHARED_ARM_A9MPCORE_REGS_H */
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