source: rtems/c/src/lib/libbsp/arm/shared/arm-gic-irq.c @ db42c079

4.11
Last change on this file since db42c079 was db42c079, checked in by Sebastian Huber <sebastian.huber@…>, on May 31, 2013 at 11:59:47 AM

bsps/arm: Add SMP support

  • Property mode set to 100644
File size: 3.6 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#include <bsp/arm-gic.h>
16
17#include <rtems/score/armv4.h>
18
19#include <libcpu/arm-cp15.h>
20
21#include <bsp/irq.h>
22#include <bsp/irq-generic.h>
23#include <bsp/start.h>
24
25#define GIC_CPUIF ((volatile gic_cpuif *) BSP_ARM_GIC_CPUIF_BASE)
26
27#define PRIORITY_DEFAULT 128
28
29void bsp_interrupt_dispatch(void)
30{
31  volatile gic_cpuif *cpuif = GIC_CPUIF;
32  uint32_t icciar = cpuif->icciar;
33  rtems_vector_number vector = GIC_CPUIF_ICCIAR_ACKINTID_GET(icciar);
34  rtems_vector_number spurious = 1023;
35
36  if (vector != spurious) {
37    uint32_t psr = _ARMV4_Status_irq_enable();
38
39    bsp_interrupt_handler_dispatch(vector);
40
41    _ARMV4_Status_restore(psr);
42
43    cpuif->icceoir = icciar;
44  }
45}
46
47rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
48{
49  rtems_status_code sc = RTEMS_SUCCESSFUL;
50
51  if (bsp_interrupt_is_valid_vector(vector)) {
52    volatile gic_dist *dist = ARM_GIC_DIST;
53
54    gic_id_enable(dist, vector);
55  } else {
56    sc = RTEMS_INVALID_ID;
57  }
58
59  return sc;
60}
61
62rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
63{
64  rtems_status_code sc = RTEMS_SUCCESSFUL;
65
66  if (bsp_interrupt_is_valid_vector(vector)) {
67    volatile gic_dist *dist = ARM_GIC_DIST;
68
69    gic_id_disable(dist, vector);
70  } else {
71    sc = RTEMS_INVALID_ID;
72  }
73
74  return sc;
75}
76
77static inline uint32_t get_id_count(volatile gic_dist *dist)
78{
79  uint32_t id_count = GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(dist->icdictr);
80
81  id_count = 32 * (id_count + 1);
82  id_count = id_count <= 1020 ? id_count : 1020;
83
84  return id_count;
85}
86
87rtems_status_code bsp_interrupt_facility_initialize(void)
88{
89  volatile gic_cpuif *cpuif = GIC_CPUIF;
90  volatile gic_dist *dist = ARM_GIC_DIST;
91  uint32_t id_count = get_id_count(dist);
92  uint32_t id;
93
94  arm_cp15_set_exception_handler(
95    ARM_EXCEPTION_IRQ,
96    _ARMV4_Exception_interrupt
97  );
98
99  for (id = 0; id < id_count; ++id) {
100    gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
101  }
102
103  for (id = 32; id < id_count; ++id) {
104    gic_id_set_targets(dist, id, 0x01);
105  }
106
107  cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
108  cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);
109  cpuif->iccicr = GIC_CPUIF_ICCICR_ENABLE;
110
111  dist->icddcr = GIC_DIST_ICDDCR_ENABLE;
112
113  return RTEMS_SUCCESSFUL;
114}
115
116#ifdef RTEMS_SMP
117BSP_START_TEXT_SECTION void arm_gic_irq_initialize_secondary_cpu(void)
118{
119  volatile gic_cpuif *cpuif = GIC_CPUIF;
120  volatile gic_dist *dist = ARM_GIC_DIST;
121
122  while ((dist->icddcr & GIC_DIST_ICDDCR_ENABLE) == 0) {
123    /* Wait */
124  }
125
126  cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
127  cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);
128  cpuif->iccicr = GIC_CPUIF_ICCICR_ENABLE;
129}
130#endif
131
132rtems_status_code arm_gic_irq_set_priority(
133  rtems_vector_number vector,
134  uint8_t priority
135)
136{
137  rtems_status_code sc = RTEMS_SUCCESSFUL;
138
139  if (bsp_interrupt_is_valid_vector(vector)) {
140    volatile gic_dist *dist = ARM_GIC_DIST;
141
142    gic_id_set_priority(dist, vector, priority);
143  } else {
144    sc = RTEMS_INVALID_ID;
145  }
146
147  return sc;
148}
149
150rtems_status_code arm_gic_irq_get_priority(
151  rtems_vector_number vector,
152  uint8_t *priority
153)
154{
155  rtems_status_code sc = RTEMS_SUCCESSFUL;
156
157  if (bsp_interrupt_is_valid_vector(vector)) {
158    volatile gic_dist *dist = ARM_GIC_DIST;
159
160    *priority = gic_id_get_priority(dist, vector);
161  } else {
162    sc = RTEMS_INVALID_ID;
163  }
164
165  return sc;
166}
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