source: rtems/c/src/lib/libbsp/arm/shared/arm-gic-irq.c @ 33c98fd

4.11
Last change on this file since 33c98fd was 33c98fd, checked in by Sebastian Huber <sebastian.huber@…>, on May 6, 2013 at 8:20:26 AM

bsps/arm: Remove superfluous parameter

  • Property mode set to 100644
File size: 3.7 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#include <bsp/arm-gic.h>
16
17#include <rtems/score/armv4.h>
18
19#include <libcpu/arm-cp15.h>
20
21#include <bsp.h>
22#include <bsp/irq.h>
23#include <bsp/irq-generic.h>
24
25#define GIC_CPUIF ((volatile gic_cpuif *) BSP_ARM_GIC_CPUIF_BASE)
26
27#define GIC_DIST ((volatile gic_dist *) BSP_ARM_GIC_DIST_BASE)
28
29#define PRIORITY_DEFAULT 128
30
31void bsp_interrupt_dispatch(void)
32{
33  volatile gic_cpuif *cpuif = GIC_CPUIF;
34  uint32_t icciar = cpuif->icciar;
35  rtems_vector_number vector = GIC_CPUIF_ICCIAR_ACKINTID_GET(icciar);
36  rtems_vector_number spurious = 1023;
37
38  if (vector != spurious) {
39    uint32_t psr = _ARMV4_Status_irq_enable();
40
41    bsp_interrupt_handler_dispatch(vector);
42
43    _ARMV4_Status_restore(psr);
44
45    cpuif->icceoir = icciar;
46  }
47}
48
49rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
50{
51  rtems_status_code sc = RTEMS_SUCCESSFUL;
52
53  if (bsp_interrupt_is_valid_vector(vector)) {
54    volatile gic_dist *dist = GIC_DIST;
55
56    gic_id_enable(dist, vector);
57  } else {
58    sc = RTEMS_INVALID_ID;
59  }
60
61  return sc;
62}
63
64rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
65{
66  rtems_status_code sc = RTEMS_SUCCESSFUL;
67
68  if (bsp_interrupt_is_valid_vector(vector)) {
69    volatile gic_dist *dist = GIC_DIST;
70
71    gic_id_disable(dist, vector);
72  } else {
73    sc = RTEMS_INVALID_ID;
74  }
75
76  return sc;
77}
78
79static inline uint32_t get_id_count(volatile gic_dist *dist)
80{
81  uint32_t id_count = GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(dist->icdictr);
82
83  id_count = 32 * (id_count + 1);
84  id_count = id_count <= 1020 ? id_count : 1020;
85
86  return id_count;
87}
88
89rtems_status_code bsp_interrupt_facility_initialize(void)
90{
91  volatile gic_cpuif *cpuif = GIC_CPUIF;
92  volatile gic_dist *dist = GIC_DIST;
93  uint32_t id_count = get_id_count(dist);
94  uint32_t id;
95
96  for (id = 0; id < id_count; ++id) {
97    gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
98  }
99
100  for (id = 32; id < id_count; ++id) {
101    gic_id_set_targets(dist, id, 0x01);
102  }
103
104  cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
105  cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);
106  cpuif->iccicr = GIC_CPUIF_ICCICR_ENABLE;
107
108  dist->icddcr = GIC_DIST_ICDDCR_ENABLE;
109
110  arm_cp15_set_exception_handler(
111    ARM_EXCEPTION_IRQ,
112    _ARMV4_Exception_interrupt
113  );
114
115  return RTEMS_SUCCESSFUL;
116}
117
118rtems_status_code arm_gic_irq_set_priority(
119  rtems_vector_number vector,
120  uint8_t priority
121)
122{
123  rtems_status_code sc = RTEMS_SUCCESSFUL;
124
125  if (bsp_interrupt_is_valid_vector(vector)) {
126    volatile gic_dist *dist = GIC_DIST;
127
128    gic_id_set_priority(dist, vector, priority);
129  } else {
130    sc = RTEMS_INVALID_ID;
131  }
132
133  return sc;
134}
135
136rtems_status_code arm_gic_irq_get_priority(
137  rtems_vector_number vector,
138  uint8_t *priority
139)
140{
141  rtems_status_code sc = RTEMS_SUCCESSFUL;
142
143  if (bsp_interrupt_is_valid_vector(vector)) {
144    volatile gic_dist *dist = GIC_DIST;
145
146    *priority = gic_id_get_priority(dist, vector);
147  } else {
148    sc = RTEMS_INVALID_ID;
149  }
150
151  return sc;
152}
153
154rtems_status_code arm_gic_irq_generate_software_irq(
155  rtems_vector_number vector,
156  arm_gic_irq_software_irq_target_filter filter,
157  uint8_t targets
158)
159{
160  rtems_status_code sc = RTEMS_SUCCESSFUL;
161
162  if (vector < 16) {
163    volatile gic_dist *dist = GIC_DIST;
164
165    dist->icdsgir = GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(filter)
166      | GIC_DIST_ICDSGIR_CPU_TARGET_LIST(targets)
167      | GIC_DIST_ICDSGIR_SGIINTID(vector);
168  } else {
169    sc = RTEMS_INVALID_ID;
170  }
171
172  return sc;
173}
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