1 | /* |
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2 | * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Obere Lagerstr. 30 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <rtems@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #include <libcpu/arm-cp15.h> |
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16 | |
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17 | static uint32_t set_translation_table_entries( |
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18 | const void *begin, |
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19 | const void *end, |
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20 | uint32_t section_flags |
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21 | ) |
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22 | { |
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23 | uint32_t cl_size = arm_cp15_get_min_cache_line_size(); |
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24 | uint32_t *ttb = arm_cp15_get_translation_table_base(); |
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25 | uint32_t i = ARM_MMU_SECT_GET_INDEX(begin); |
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26 | uint32_t iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(end)); |
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27 | uint32_t index_mask = (1U << (32 - ARM_MMU_SECT_BASE_SHIFT)) - 1U; |
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28 | uint32_t ctrl; |
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29 | uint32_t section_flags_of_first_entry; |
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30 | |
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31 | ctrl = arm_cp15_mmu_disable(cl_size); |
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32 | arm_cp15_tlb_invalidate(); |
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33 | section_flags_of_first_entry = ttb [i]; |
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34 | |
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35 | while (i != iend) { |
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36 | uint32_t addr = i << ARM_MMU_SECT_BASE_SHIFT; |
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37 | |
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38 | ttb [i] = addr | section_flags; |
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39 | |
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40 | i = (i + 1U) & index_mask; |
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41 | } |
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42 | |
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43 | arm_cp15_set_control(ctrl); |
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44 | |
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45 | return section_flags_of_first_entry; |
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46 | } |
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47 | |
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48 | uint32_t arm_cp15_set_translation_table_entries( |
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49 | const void *begin, |
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50 | const void *end, |
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51 | uint32_t section_flags |
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52 | ) |
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53 | { |
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54 | rtems_interrupt_level level; |
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55 | uint32_t section_flags_of_first_entry; |
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56 | |
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57 | rtems_interrupt_disable(level); |
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58 | section_flags_of_first_entry = |
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59 | set_translation_table_entries(begin, end, section_flags); |
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60 | rtems_interrupt_enable(level); |
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61 | |
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62 | return section_flags_of_first_entry; |
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63 | } |
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