source: rtems/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c @ 991fdb33

4.115
Last change on this file since 991fdb33 was c499856, checked in by Chris Johns <chrisj@…>, on Mar 20, 2014 at 9:10:47 PM

Change all references of rtems.com to rtems.org.

  • Property mode set to 100644
File size: 1.5 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <libcpu/arm-cp15.h>
16
17#include <bsp/linker-symbols.h>
18
19void arm_cp15_set_exception_handler(
20  Arm_symbolic_exception_name exception,
21  void (*handler)(void)
22)
23{
24  if ((unsigned) exception < MAX_EXCEPTIONS) {
25    uint32_t *cpu_table = (uint32_t *) 0 + MAX_EXCEPTIONS;
26    uint32_t *mirror_table = (uint32_t *) bsp_vector_table_begin + MAX_EXCEPTIONS;
27    uint32_t current_handler = mirror_table[exception];
28
29    if (current_handler != (uint32_t) handler) {
30      size_t table_size = MAX_EXCEPTIONS * sizeof(uint32_t);
31      uint32_t cls = arm_cp15_get_min_cache_line_size();
32      uint32_t ctrl;
33      rtems_interrupt_level level;
34
35      rtems_interrupt_disable(level);
36
37      ctrl = arm_cp15_mmu_disable(cls);
38
39      mirror_table[exception] = (uint32_t) handler;
40
41      rtems_cache_flush_multiple_data_lines(mirror_table, table_size);
42
43      /*
44       * On ARMv7 processors with the Security Extension the mirror table might
45       * be the actual table used by the processor.
46       */
47      rtems_cache_invalidate_multiple_instruction_lines(mirror_table, table_size);
48
49      rtems_cache_invalidate_multiple_instruction_lines(cpu_table, table_size);
50
51      arm_cp15_set_control(ctrl);
52
53      rtems_interrupt_enable(level);
54    }
55  }
56}
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