source: rtems/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c @ 991fdb33

4.115
Last change on this file since 991fdb33 was c34f94f7, checked in by Sebastian Huber <sebastian.huber@…>, on Feb 16, 2015 at 10:55:03 AM

score: Add _CPU_SMP_Prepare_start_multitasking()

Update #2268.

  • Property mode set to 100644
File size: 1.5 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <assert.h>
16
17#include <rtems/score/smpimpl.h>
18
19#include <libcpu/arm-cp15.h>
20
21#include <bsp/irq.h>
22#include <bsp/linker-symbols.h>
23
24static void bsp_inter_processor_interrupt(void *arg)
25{
26  _SMP_Inter_processor_interrupt_handler();
27}
28
29uint32_t _CPU_SMP_Initialize(void)
30{
31  uint32_t hardware_count = arm_gic_irq_processor_count();
32  uint32_t linker_count = (uint32_t) bsp_processor_count;
33
34  return hardware_count <= linker_count ? hardware_count : linker_count;
35}
36
37void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
38{
39  if (cpu_count > 0) {
40    rtems_status_code sc;
41
42    sc = rtems_interrupt_handler_install(
43      ARM_GIC_IRQ_SGI_0,
44      "IPI",
45      RTEMS_INTERRUPT_UNIQUE,
46      bsp_inter_processor_interrupt,
47      NULL
48    );
49    assert(sc == RTEMS_SUCCESSFUL);
50
51#if defined(BSP_DATA_CACHE_ENABLED) || defined(BSP_INSTRUCTION_CACHE_ENABLED)
52    /* Enable unified L2 cache */
53    rtems_cache_enable_data();
54#endif
55  }
56}
57
58void _CPU_SMP_Prepare_start_multitasking( void )
59{
60  /* Do nothing */
61}
62
63void _CPU_SMP_Send_interrupt( uint32_t target_processor_index )
64{
65  arm_gic_irq_generate_software_irq(
66    ARM_GIC_IRQ_SGI_0,
67    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
68    (uint8_t) (1U << target_processor_index)
69  );
70}
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