source: rtems/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c @ 53e008b

4.115
Last change on this file since 53e008b was 53e008b, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 10, 2014 at 1:48:05 PM

score: SMP initialization changes

Add and use _CPU_SMP_Start_processor(). Add and use
_CPU_SMP_Finalize_initialization(). This makes most
_CPU_SMP_Initialize() functions a bit simpler since we can calculate the
minimum value of the count of processors requested by the application
configuration and the count of physically or virtually available
processors in the high-level code.

The CPU port has now the ability to signal a processor start failure.
With the support for clustered/partitioned scheduling the presence of
particular processors can be configured to be optional or mandatory.
There will be a fatal error only in case mandatory processors are not
present.

The CPU port may use a timeout to monitor the start of a processor.

  • Property mode set to 100644
File size: 1.3 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <assert.h>
16
17#include <rtems/score/smpimpl.h>
18
19#include <libcpu/arm-cp15.h>
20
21#include <bsp/irq.h>
22
23static void bsp_inter_processor_interrupt(void *arg)
24{
25  _SMP_Inter_processor_interrupt_handler();
26}
27
28uint32_t _CPU_SMP_Initialize(void)
29{
30  return arm_gic_irq_processor_count();
31}
32
33bool _CPU_SMP_Start_processor(uint32_t cpu_index)
34{
35  (void) cpu_index;
36
37  /* Nothing to do */
38
39  return true;
40}
41
42void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
43{
44  if (cpu_count > 0) {
45    rtems_status_code sc;
46
47    sc = rtems_interrupt_handler_install(
48      ARM_GIC_IRQ_SGI_0,
49      "IPI",
50      RTEMS_INTERRUPT_UNIQUE,
51      bsp_inter_processor_interrupt,
52      NULL
53    );
54    assert(sc == RTEMS_SUCCESSFUL);
55  }
56}
57
58void _CPU_SMP_Send_interrupt( uint32_t target_processor_index )
59{
60  arm_gic_irq_generate_software_irq(
61    ARM_GIC_IRQ_SGI_0,
62    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
63    (uint8_t) (1U << target_processor_index)
64  );
65}
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