source:
rtems/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c
@
50440c0
Last change on this file since 50440c0 was 50440c0, checked in by Sebastian Huber <sebastian.huber@…>, on 11/19/14 at 14:30:24 | |
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[db42c079] | 1 | /* |
2 | * Copyright (c) 2013 embedded brains GmbH. All rights reserved. | |
3 | * | |
4 | * embedded brains GmbH | |
5 | * Dornierstr. 4 | |
6 | * 82178 Puchheim | |
7 | * Germany | |
8 | * <info@embedded-brains.de> | |
9 | * | |
10 | * The license and distribution terms for this file may be | |
11 | * found in the file LICENSE in this distribution or at | |
[c499856] | 12 | * http://www.rtems.org/license/LICENSE. |
[db42c079] | 13 | */ |
14 | ||
15 | #include <assert.h> | |
16 | ||
[4d9bd56] | 17 | #include <rtems/score/smpimpl.h> |
[db42c079] | 18 | |
19 | #include <libcpu/arm-cp15.h> | |
20 | ||
21 | #include <bsp/irq.h> | |
[50440c0] | 22 | #include <bsp/linker-symbols.h> |
[db42c079] | 23 | |
[4d9bd56] | 24 | static void bsp_inter_processor_interrupt(void *arg) |
[db42c079] | 25 | { |
[4d9bd56] | 26 | _SMP_Inter_processor_interrupt_handler(); |
[db42c079] | 27 | } |
28 | ||
[53e008b] | 29 | uint32_t _CPU_SMP_Initialize(void) |
[db42c079] | 30 | { |
[50440c0] | 31 | uint32_t hardware_count = arm_gic_irq_processor_count(); |
32 | uint32_t linker_count = (uint32_t) bsp_processor_count; | |
[53e008b] | 33 | |
[50440c0] | 34 | return hardware_count <= linker_count ? hardware_count : linker_count; |
[53e008b] | 35 | } |
36 | ||
37 | void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) | |
38 | { | |
39 | if (cpu_count > 0) { | |
40 | rtems_status_code sc; | |
[db42c079] | 41 | |
[53e008b] | 42 | sc = rtems_interrupt_handler_install( |
43 | ARM_GIC_IRQ_SGI_0, | |
44 | "IPI", | |
45 | RTEMS_INTERRUPT_UNIQUE, | |
46 | bsp_inter_processor_interrupt, | |
47 | NULL | |
48 | ); | |
49 | assert(sc == RTEMS_SUCCESSFUL); | |
[50440c0] | 50 | |
51 | #if defined(BSP_DATA_CACHE_ENABLED) || defined(BSP_INSTRUCTION_CACHE_ENABLED) | |
52 | /* Enable unified L2 cache */ | |
53 | rtems_cache_enable_data(); | |
54 | #endif | |
[53e008b] | 55 | } |
[db42c079] | 56 | } |
57 | ||
[ca63ae2] | 58 | void _CPU_SMP_Send_interrupt( uint32_t target_processor_index ) |
[db42c079] | 59 | { |
[53e008b] | 60 | arm_gic_irq_generate_software_irq( |
[db42c079] | 61 | ARM_GIC_IRQ_SGI_0, |
62 | ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST, | |
[ca63ae2] | 63 | (uint8_t) (1U << target_processor_index) |
[db42c079] | 64 | ); |
65 | } |
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