1 | /* |
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2 | * Philips LPC22XX BSP header file |
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3 | * |
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4 | * by Ray,Xu |
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5 | * |
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6 | * The license and distribution terms for this file may be |
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7 | * found in the file LICENSE in this distribution or at |
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8 | * |
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9 | * http://www.rtems.com/license/LICENSE. |
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10 | * |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | #ifndef _BSP_H |
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15 | #define _BSP_H |
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16 | |
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17 | #ifdef __cplusplus |
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18 | extern "C" { |
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19 | #endif |
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20 | |
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21 | #include <bspopts.h> |
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22 | |
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23 | #include <rtems.h> |
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24 | #include <rtems/iosupp.h> |
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25 | #include <rtems/console.h> |
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26 | #include <rtems/clockdrv.h> |
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27 | |
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28 | |
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29 | #define CONFIG_ARM_CLK 60000000L |
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30 | /* cclk=cco/(2*P) */ |
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31 | /* cco = cclk*2*P */ |
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32 | |
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33 | #define LPC22xx_Fcclk CONFIG_ARM_CLK /* system clk frequecy,<=60Mhz, defined in system configuration */ |
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34 | |
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35 | /* Fcco 156M~320Mhz*/ |
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36 | #define LPC22xx_Fcclk CONFIG_ARM_CLK /* system clk frequecy,<=60Mhz, defined in system configuration */ |
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37 | #define LPC22xx_Fcco LPC22xx_Fcclk * 4 |
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38 | #define LPC22xx_Fpclk (LPC22xx_Fcclk /4) *1 /*VPB clk frequency,1,1/2,1/4 times of Fcclk */ |
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39 | |
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40 | |
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41 | |
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42 | /* Fcclk range: 10MHz ~ MCU allowed frequency */ |
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43 | #define Fcclk_MIN 10000000L |
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44 | #define Fcclk_MAX 60000000L |
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45 | |
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46 | /* Fcco range: 156MHz ~ 320MHz */ |
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47 | #define Fcco_MIN 156000000L |
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48 | #define Fcco_MAX 320000000L |
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49 | |
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50 | #define PLLFEED_DATA1 0xAA |
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51 | #define PLLFEED_DATA2 0x55 |
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52 | |
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53 | /* PLL PLLCON register bit descriptions */ |
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54 | #define PLLCON_ENABLE_BIT 0 |
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55 | #define PLLCON_CONNECT_BIT 1 |
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56 | |
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57 | /* PLL PLLSTAT register bit descriptions */ |
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58 | #define PLLSTAT_ENABLE_BIT 8 |
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59 | #define PLLSTAT_CONNECT_BIT 9 |
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60 | #define PLLSTAT_LOCK_BIT 10 |
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61 | |
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62 | /* PM Peripheral Type */ |
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63 | #define PC_TIMER0 0x2 |
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64 | #define PC_TIMER1 0x4 |
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65 | #define PC_UART0 0x8 |
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66 | #define PC_UART1 0x10 |
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67 | #define PC_PWM0 0x20 |
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68 | #define PC_I2C 0x80 |
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69 | #define PC_SPI0 0x100 |
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70 | #define PC_RTC 0x200 |
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71 | |
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72 | // OSC [Hz] |
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73 | #define FOSC 11059200 |
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74 | // Core clk [Hz] |
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75 | #define FCCLK FOSC<<2 |
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76 | /** |
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77 | * help file |
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78 | */ |
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79 | /* ϵͳÉèÖÃ, Fosc¡¢Fcclk¡¢Fcco¡¢Fpclk±ØÐ붚Òå*/ |
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80 | #define Fosc 11059200 //Ÿ§ÕñƵÂÊ,10MHz~25MHz£¬ÓŠµ±ÓëʵŒÊÒ»ÖÁ |
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81 | #define Fcclk (Fosc << 2) //ϵͳƵÂÊ£¬±ØÐëΪFoscµÄÕûÊý±¶(1~32)£¬ÇÒ<=60MHZ |
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82 | #define Fcco (Fcclk <<2) //CCOƵÂÊ£¬±ØÐëΪFcclkµÄ2¡¢4¡¢8¡¢16±¶£¬·¶Î§Îª156MHz~320MHz |
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83 | #define Fpclk (Fcclk >>2) * 1 //VPBʱÖÓƵÂÊ£¬Ö»ÄÜΪ(Fcclk / 4)µÄ1 ~ 4±¶ |
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84 | #define M Fcclk / Fosc; |
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85 | #define P_min Fcco_MIN / (2*Fcclk) + 1; |
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86 | #define P_max Fcco_MAX / (2*Fcclk); |
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87 | |
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88 | |
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89 | |
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90 | #define UART_BPS 115200 |
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91 | |
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92 | // Time Precision time [us] |
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93 | #define TIMER_PRECISION 10 |
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94 | |
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95 | // I2C Speed [bit/s] |
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96 | #define I2CSPEED 20000 // 20 Kbit/s |
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97 | |
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98 | // Uarts buffers size |
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99 | #define RXBUFSIZE 32 |
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100 | #define TXBUFSIZE 32 |
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101 | |
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102 | // SPI Speed [bit/s] |
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103 | #define SPISPEED 1500000 // 1.5 Mbit/s |
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104 | // SPI EEPROM CS pin (SSEL is not suitable for CS, because is used by SPI module for multi master SPI interface) |
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105 | #define SPI_CS_PIN P0_13 |
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106 | #define SPI_CS_PIN_FUNC PINSEL0_bit.SPI_CS_PIN |
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107 | |
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108 | // Flash definition |
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109 | //#define FLASH_SIZE (0x200000-FLASH_BOOT) // Total area of Flash region in words 8 bit |
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110 | #define FLASH_SIZE (0x80000-FLASH_BOOT) // Total area of Flash region in words 8 bit |
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111 | //#define FLASH_SIZE (0x80000-FLASH_BOOT) // Total area of Flash region in words 8 bit |
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112 | #define FLASH_BEGIN 0x80000000 |
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113 | #define FLASH_BASE (FLASH_BEGIN+FLASH_BOOT) //First 0x8000 bytes reserved for boot loader etc. |
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114 | |
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115 | // SRAM definition |
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116 | #define SRAM_SIZE 0x100000 // Total area of Flash region in words 8 bit |
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117 | #define SRAM_BASE 0x81000000 //First 0x8000 bytes reserved for boot loader etc. |
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118 | |
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119 | // CS8900A definition |
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120 | #define CS8900A_BASE 0x82000000 // |
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121 | // RTL8019AS definition |
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122 | #define RTL8019AS_BASE 0x82000000 // |
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123 | |
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124 | |
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125 | |
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126 | |
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127 | /* |
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128 | * Define the interrupt mechanism for Time Test 27 |
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129 | * |
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130 | * NOTE: Following are not defined and are board independent |
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131 | * |
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132 | */ |
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133 | struct rtems_bsdnet_ifconfig; |
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134 | int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config, |
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135 | int attaching); |
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136 | |
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137 | #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 |
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138 | #define CONFIGURE_INTERRUPT_STACK_MEMORY (1 * 1024) |
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139 | |
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140 | extern rtems_configuration_table BSP_Configuration; |
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141 | |
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142 | /* |
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143 | * Network driver configuration |
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144 | */ |
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145 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" |
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146 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH cs8900_driver_attach |
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147 | |
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148 | #ifdef __cplusplus |
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149 | } |
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150 | #endif |
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151 | |
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152 | #endif /* _BSP_H */ |
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