source: rtems/c/src/lib/libbsp/arm/rtl22xx/include/bsp.h @ 9f34aa5

4.115
Last change on this file since 9f34aa5 was 9f34aa5, checked in by Sebastian Huber <sebastian.huber@…>, on 03/20/15 at 08:45:02

bsp/rtl22xx: Add prefix due to name conflicts

Close #2303.

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[78e529a6]1/**
2 * @file
3 * @ingroup arm_rtl22xx
4 * @brief Global BSP definitions.
5 */
6
[f4392b88]7/*
[e890774]8 * Philips LPC22XX/LPC21xx BSP header file
[f4392b88]9 *
[e890774]10 * by Ray,Xu <Rayx.cn@gmail.com>
[32b8506]11 *
[f4392b88]12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
[c499856]14 *  http://www.rtems.org/license/LICENSE.
[f4392b88]15*/
16#ifndef _BSP_H
17#define _BSP_H
18
19#include <bspopts.h>
[a052181]20#include <bsp/default-initial-extension.h>
[f4392b88]21
[78e529a6]22/**
23 * @defgroup arm_rtl22xx RTL22XX Support
24 * @ingroup bsp_arm
25 * @brief RTL22XX Support Package
26 * @{
27 */
28
[f4392b88]29#include <rtems.h>
30#include <rtems/iosupp.h>
31#include <rtems/console.h>
32#include <rtems/clockdrv.h>
33
[46dde0fc]34#ifdef __cplusplus
35extern "C" {
36#endif
37
[336d67a]38#define BSP_FEATURE_IRQ_EXTENSION
[f4392b88]39
[32b8506]40#define CONFIG_ARM_CLK 60000000L
[f4392b88]41/* cclk=cco/(2*P) */
42/* cco = cclk*2*P       */
43
[78e529a6]44/** @brief system clk frequecy,<=60Mhz, defined in system configuration */
[b9005867]45#define LPC22xx_Fcclk   CONFIG_ARM_CLK
[f4392b88]46
47/* Fcco 156M~320Mhz*/
[78e529a6]48/** @brief system clk frequecy,<=60Mhz, defined in system configuration */
[b9005867]49#define LPC22xx_Fcclk   CONFIG_ARM_CLK
[f4392b88]50#define LPC22xx_Fcco    LPC22xx_Fcclk * 4
[78e529a6]51/** @brief VPB clk frequency,1,1/2,1/4 times of Fcclk */
[b9005867]52#define LPC22xx_Fpclk   (LPC22xx_Fcclk /4) *1
[f4392b88]53
54
55
[78e529a6]56/**
57 * @name Fcclk range: 10MHz ~ MCU allowed frequency
58 * @{
59 */
60
[f4392b88]61#define Fcclk_MIN           10000000L
62#define Fcclk_MAX           60000000L
63
[78e529a6]64/** @} */
65
66/**
67 * @name Fcco range: 156MHz ~ 320MHz
68 * @{
69 */
70
[f4392b88]71#define Fcco_MIN            156000000L
72#define Fcco_MAX            320000000L
73
[78e529a6]74/** @} */
75
[f4392b88]76#define PLLFEED_DATA1       0xAA
77#define PLLFEED_DATA2       0x55
78
[78e529a6]79/**
80 * @name PLL PLLCON register bit descriptions
81 * @{
82 */
83
[f4392b88]84#define PLLCON_ENABLE_BIT   0
85#define PLLCON_CONNECT_BIT  1
86
[78e529a6]87/** @} */
88
89/**
90 * @name PLL PLLSTAT register bit descriptions
91 * @{
92 */
93
[f4392b88]94#define PLLSTAT_ENABLE_BIT  8
95#define PLLSTAT_CONNECT_BIT 9
96#define PLLSTAT_LOCK_BIT    10
97
[78e529a6]98/** @} */
99
100/**
101 * @name PM Peripheral Type
102 * @{
103 */
104
[f4392b88]105#define PC_TIMER0           0x2
106#define PC_TIMER1           0x4
107#define PC_UART0            0x8
108#define PC_UART1            0x10
109#define PC_PWM0             0x20
110#define PC_I2C              0x80
111#define PC_SPI0             0x100
112#define PC_RTC              0x200
113
[78e529a6]114/** @} */
115
116/** @brief OSC [Hz] */
[f4392b88]117#define FOSC              11059200
[78e529a6]118/** @brief Core clk [Hz] */
[f4392b88]119#define FCCLK             FOSC<<2
[78e529a6]120
[f4392b88]121/**
[78e529a6]122 * @name System Configure
123 * @{
124 */
125
126/** @brief osc freq,10MHz~25MHz, change to a real one if needed */
127#define Fosc    11059200
128/** @brief system freq 2^n time of  Fosc(1~32) <=60MHZ */
129#define Fcclk   (Fosc << 2)
130/** @brief CCO freq 2,4,8,16 time of Fcclk 156MHz~320MHz */
131#define Fcco    (Fcclk <<2)
132/** @brief VPB freq only(Fcclk / 4) 1~4 */
133#define Fpclk   (Fcclk >>2) * 1
[c187b50]134/* This was M.  That is a BAD BAD public constant.  I renamed it to
135 * JOEL_M so it wouldn't conflict with user code.  If you can find
136 * a better name, fix this.  But nothing I found uses it.
137 */
[78e529a6]138
139/** @} */
140
[c187b50]141#define JOEL_M       Fcclk / Fosc
[b9005867]142#define P_min   Fcco_MIN / (2*Fcclk) + 1;
143#define P_max   Fcco_MAX / (2*Fcclk);
[f4392b88]144
145#define  UART_BPS       115200
146
[78e529a6]147/** @brief Time Precision time [us] */
[f4392b88]148#define TIMER_PRECISION   10
149
[78e529a6]150/** @brief I2C Speed [bit/s] */
[f4392b88]151#define I2CSPEED          20000         // 20 Kbit/s
152
[78e529a6]153/**
154 * @name Uarts buffers size
155 * @{
156 */
157
[f4392b88]158#define RXBUFSIZE         32
159#define TXBUFSIZE         32
160
[78e529a6]161/** @} */
162
163/** @brief SPI Speed [bit/s] */
[f4392b88]164#define SPISPEED          1500000       // 1.5 Mbit/s
[78e529a6]165/** @brief SPI EEPROM CS pin
166 *
167 *  (SSEL is not suitable for CS, because is used by SPI module for multi master SPI interface)
168 */
[f4392b88]169#define SPI_CS_PIN        P0_13
170#define SPI_CS_PIN_FUNC   PINSEL0_bit.SPI_CS_PIN
171
[78e529a6]172/**
173 * @name Flash definition
174 * @{
175 */
176
[9f34aa5]177//#define RTL22XX_FLASH_SIZE      (0x200000-RTL22XX_FLASH_BOOT)   // Total area of Flash region in words 8 bit
[78e529a6]178/** @brief Total area of Flash region in words 8 bit */
[9f34aa5]179#define RTL22XX_FLASH_SIZE        (0x80000-RTL22XX_FLASH_BOOT)
180//#define RTL22XX_FLASH_SIZE      (0x80000-RTL22XX_FLASH_BOOT)      // Total area of Flash region in words 8 bit
181#define RTL22XX_FLASH_BEGIN       0x80000000
[78e529a6]182/** @brief First 0x8000 bytes reserved for boot loader etc. */
[9f34aa5]183#define RTL22XX_FLASH_BASE        (RTL22XX_FLASH_BEGIN+RTL22XX_FLASH_BOOT)
[78e529a6]184
185/** @} */
186
187/**
188 * @name SRAM definition
189 * @{
190 */
[f4392b88]191
[78e529a6]192/** @brief Total area of Flash region in words 8 bit */
193#define SRAM_SIZE         0x100000
194/** @brief First 0x8000 bytes reserved for boot loader etc. */
195#define SRAM_BASE         0x81000000
[f4392b88]196
[78e529a6]197/** @} */
198
199/** @brief CS8900A definition */
[b9005867]200#define CS8900A_BASE      0x82000000
[78e529a6]201/** @brief RTL8019AS definition */
[b9005867]202#define RTL8019AS_BASE    0x82000000
[f4392b88]203
204struct rtems_bsdnet_ifconfig;
205int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
206                          int                          attaching);
207
[78e529a6]208/**
209 * @name Network driver configuration
210 * @{
[f4392b88]211 */
[78e529a6]212
[f4392b88]213#define RTEMS_BSP_NETWORK_DRIVER_NAME   "eth0"
214#define RTEMS_BSP_NETWORK_DRIVER_ATTACH cs8900_driver_attach
215
[78e529a6]216/** @} */
217
[23c3b3b2]218/*
219 * Prototypes for methods used across file boundaries in the BSP.
220 */
221extern void  UART0_Ini(void);
222
[78e529a6]223/** @} */
224
[f4392b88]225#ifdef __cplusplus
226}
227#endif
228
229#endif /* _BSP_H */
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