[a91dc98b] | 1 | /* |
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| 2 | * Copyright (c) 2013 embedded brains GmbH. All rights reserved. |
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| 3 | * |
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| 4 | * embedded brains GmbH |
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| 5 | * Dornierstr. 4 |
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| 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <info@embedded-brains.de> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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[c499856] | 12 | * http://www.rtems.org/license/LICENSE. |
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[a91dc98b] | 13 | */ |
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| 14 | |
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[2d3caccf] | 15 | #define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION |
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| 16 | |
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[a91dc98b] | 17 | #include <bsp.h> |
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| 18 | #include <bsp/start.h> |
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| 19 | #include <bsp/arm-cp15-start.h> |
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[db42c079] | 20 | #include <bsp/arm-a9mpcore-start.h> |
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[a91dc98b] | 21 | |
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| 22 | BSP_START_DATA_SECTION static const arm_cp15_start_section_config |
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| 23 | rvpbxa9_mmu_config_table[] = { |
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[fbed79b] | 24 | ARMV7_CP15_START_DEFAULT_SECTIONS, |
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[a91dc98b] | 25 | { |
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| 26 | .begin = 0x10000000U, |
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| 27 | .end = 0x10020000U, |
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[1dcf5fe] | 28 | .flags = ARMV7_MMU_DEVICE |
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[a91dc98b] | 29 | }, { |
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| 30 | .begin = 0x1f000000U, |
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| 31 | .end = 0x20000000U, |
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[1dcf5fe] | 32 | .flags = ARMV7_MMU_DEVICE |
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[2c93c5a] | 33 | }, { |
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| 34 | .begin = 0x4e000000U, |
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| 35 | .end = 0x4f000000U, |
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| 36 | .flags = ARMV7_MMU_DEVICE |
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[a91dc98b] | 37 | } |
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| 38 | }; |
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| 39 | |
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| 40 | BSP_START_TEXT_SECTION static void setup_mmu_and_cache(void) |
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| 41 | { |
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| 42 | uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache( |
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[06adfae] | 43 | ARM_CP15_CTRL_A, |
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[a91dc98b] | 44 | ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z |
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| 45 | ); |
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| 46 | |
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[1df348b] | 47 | arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache( |
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[a91dc98b] | 48 | ctrl, |
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| 49 | (uint32_t *) bsp_translation_table_base, |
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[1dcf5fe] | 50 | ARM_MMU_DEFAULT_CLIENT_DOMAIN, |
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[a91dc98b] | 51 | &rvpbxa9_mmu_config_table[0], |
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| 52 | RTEMS_ARRAY_SIZE(rvpbxa9_mmu_config_table) |
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| 53 | ); |
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| 54 | } |
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| 55 | |
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[db42c079] | 56 | BSP_START_TEXT_SECTION void bsp_start_hook_0(void) |
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| 57 | { |
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[970aa80] | 58 | #ifdef RTEMS_SMP |
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| 59 | uint32_t cpu_id = arm_cortex_a9_get_multiprocessor_cpu_id(); |
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| 60 | |
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| 61 | /* |
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| 62 | * QEMU jumps to the entry point of the ELF file on all processors. Prevent |
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| 63 | * a SMP_FATAL_MULTITASKING_START_ON_INVALID_PROCESSOR this way. |
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| 64 | */ |
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| 65 | if ( cpu_id >= rtems_configuration_get_maximum_processors() ) { |
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| 66 | while (true) { |
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| 67 | _ARM_Wait_for_event(); |
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| 68 | } |
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| 69 | } |
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| 70 | #endif |
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| 71 | |
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[db42c079] | 72 | arm_a9mpcore_start_hook_0(); |
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| 73 | } |
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| 74 | |
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[a91dc98b] | 75 | BSP_START_TEXT_SECTION void bsp_start_hook_1(void) |
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| 76 | { |
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[9a037da9] | 77 | arm_a9mpcore_start_hook_1(); |
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[a91dc98b] | 78 | bsp_start_copy_sections(); |
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| 79 | setup_mmu_and_cache(); |
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| 80 | bsp_start_clear_bss(); |
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| 81 | } |
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