source: rtems/c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c @ bef2b73

5
Last change on this file since bef2b73 was bef2b73, checked in by Pavel Pisa <pisa@…>, on Jul 17, 2016 at 4:45:46 PM

arm/raspberrypi: use cache manager operations to flush/invalidate all cache levels.

This fix strange behavior where some stale content has been
stored in level 2 cache before RTEMS has been start from U-boot
which has reappeared after MMU enable and shadow vector
table at start of SDRAM.

  • Property mode set to 100644
File size: 2.0 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup arm_start
5 *
6 * @brief Rasberry Pi startup code.
7 */
8
9/*
10 * Copyright (c) 2013. Hesham AL-Matary
11 * Copyright (c) 2013 by Alan Cudmore
12 * based on work by:
13 * Copyright (c) 2009
14 * embedded brains GmbH
15 * Obere Lagerstr. 30
16 * D-82178 Puchheim
17 * Germany
18 * <rtems@embedded-brains.de>
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.org/license/LICENSE
23 */
24
25#include <bspopts.h>
26#include <bsp/start.h>
27#include <bsp/raspberrypi.h>
28#include <bsp/mm.h>
29#include <libcpu/arm-cp15.h>
30#include <bsp.h>
31
32
33void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
34{
35  uint32_t sctlr_val;
36
37  sctlr_val = arm_cp15_get_control();
38
39  /*
40   * Current U-boot loader seems to start kernel image
41   * with I and D caches on and MMU enabled.
42   * If RTEMS application image finds that cache is on
43   * during startup then disable caches.
44   */
45  if (sctlr_val & (ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
46    if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
47      /*
48       * If the data cache is on then ensure that it is clean
49       * before switching off to be extra carefull.
50       */
51      rtems_cache_flush_entire_data();
52      rtems_cache_invalidate_entire_data();
53    }
54    arm_cp15_flush_prefetch_buffer();
55    sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
56    arm_cp15_set_control(sctlr_val);
57  }
58  rtems_cache_invalidate_entire_data();
59  rtems_cache_invalidate_entire_instruction();
60  arm_cp15_branch_predictor_invalidate_all();
61  arm_cp15_tlb_invalidate();
62  arm_cp15_flush_prefetch_buffer();
63
64  /* Clear Translation Table Base Control Register */
65  arm_cp15_set_translation_table_base_control_register(0);
66
67  /* Clear Secure or Non-secure Vector Base Address Register */
68  arm_cp15_set_vector_base_address(0);
69}
70
71void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
72{
73  bsp_start_copy_sections();
74  bsp_memory_management_initialize();
75  bsp_start_clear_bss();
76
77  rpi_video_init();
78}
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