source: rtems/c/src/lib/libbsp/arm/nds/libnds/include/nds/arm7/clock.h @ ca11e781

4.104.115
Last change on this file since ca11e781 was ca11e781, checked in by Ralf Corsepius <ralf.corsepius@…>, on 12/07/09 at 07:12:20

Eliminate various warnings.

  • Property mode set to 100644
File size: 4.4 KB
Line 
1/*---------------------------------------------------------------------------------
2
3        ARM7 realtime clock
4
5        Copyright (C) 2005
6                Michael Noland (joat)
7                Jason Rogers (dovoto)
8                Dave Murphy (WinterMute)
9
10        This software is provided 'as-is', without any express or implied
11        warranty.  In no event will the authors be held liable for any
12        damages arising from the use of this software.
13
14        Permission is granted to anyone to use this software for any
15        purpose, including commercial applications, and to alter it and
16        redistribute it freely, subject to the following restrictions:
17
18        1.      The origin of this software must not be misrepresented; you
19                must not claim that you wrote the original software. If you use
20                this software in a product, an acknowledgment in the product
21                documentation would be appreciated but is not required.
22        2.      Altered source versions must be plainly marked as such, and
23                must not be misrepresented as being the original software.
24        3.      This notice may not be removed or altered from any source
25                distribution.
26
27---------------------------------------------------------------------------------*/
28
29#ifndef ARM7_CLOCK_INCLUDE
30#define ARM7_CLOCK_INCLUDE
31
32
33#ifndef ARM7
34#error The clock is only available on the ARM7
35#endif
36
37#ifdef __cplusplus
38extern "C" {
39#endif
40
41
42#include <nds/arm7/serial.h>
43
44// RTC registers
45#define WRITE_STATUS_REG1  0x60
46#define READ_STATUS_REG1   0x61
47
48/*
49  Status Register 1
50    0   W   Reset                (0=Normal, 1=Reset)
51    1   R/W 12/24 hour mode      (0=12 hour, 1=24 hour)
52    2-3 R/W General purpose bits
53    4   R   Interrupt 1 Flag (1=Yes)                      ;auto-cleared on read
54    5   R   Interrupt 2 Flag (1=Yes)                      ;auto-cleared on read
55    6   R   Power Low Flag (0=Normal, 1=Power is/was low) ;auto-cleared on read
56    7   R   Power Off Flag (0=Normal, 1=Power was off)    ;auto-cleared on read
57    Power off indicates that the battery was removed or fully discharged,
58    all registers are reset to 00h (or 01h), and must be re-initialized.
59*/
60#define STATUS_POC       (1<<7)  // read-only, cleared by reading (1 if just powered on)
61#define STATUS_BLD       (1<<6)  // read-only, cleared by reading (1 if power dropped below the safety threshold)
62#define STATUS_INT2      (1<<5)  // read-only, INT2 has occured
63#define STATUS_INT1      (1<<4)  // read-only, INT1 has occured
64#define STATUS_SC1       (1<<3)  // R/W scratch bit
65#define STATUS_SC0       (1<<2)  // R/W scratch bit
66#define STATUS_24HRS     (1<<1)  // 24 hour mode when 1, 12 hour mode when 0
67#define STATUS_RESET     (1<<0)  // write-only, reset when 1 written
68
69#define WRITE_STATUS_REG2  0x62
70#define READ_STATUS_REG2   0x63
71/*
72  Status Register 2
73    0-3 R/W INT1 Mode/Enable
74            0000b Disable
75            0x01b Selected Frequency steady interrupt
76            0x10b Per-minute edge interrupt
77            0011b Per-minute steady interrupt 1 (duty 30.0 secomds)
78            0100b Alarm 1 interrupt
79            0111b Per-minute steady interrupt 2 (duty 0.0079 secomds)
80            1xxxb 32kHz output
81    4-5 R/W General purpose bits
82    6   R/W INT2 Enable
83            0b    Disable
84            1b    Alarm 2 interrupt
85    7   R/W Test Mode (0=Normal, 1=Test, don't use) (cleared on Reset)
86*/
87#define STATUS_TEST      (1<<7)  //
88#define STATUS_INT2AE    (1<<6)  //
89#define STATUS_SC3       (1<<5)  // R/W scratch bit
90#define STATUS_SC2       (1<<4)  // R/W scratch bit
91
92#define STATUS_32kE      (1<<3)  // Interrupt mode bits
93#define STATUS_INT1AE    (1<<2)  //
94#define STATUS_INT1ME    (1<<1)  //
95#define STATUS_INT1FE    (1<<0)  //
96
97// full 7 bytes for time and date
98#define WRITE_TIME_AND_DATE     0x64
99#define READ_TIME_AND_DATE      0x65
100
101// last 3 bytes of current time
102#define WRITE_TIME    0x66
103#define READ_TIME         0x67
104
105#define WRITE_INT_REG1     0x68
106#define READ_INT_REG1      0x69
107
108#define READ_INT_REG2      0x6A
109#define WRITE_INT_REG2     0x6B
110
111#define READ_CLOCK_ADJUST_REG  0x6C
112#define WRITE_CLOCK_ADJUST_REG 0x6D
113// clock-adjustment register
114
115#define READ_FREE_REG      0x6E
116#define WRITE_FREE_REG     0x6F
117
118
119void rtcReset(void);
120void rtcTransaction(uint8 * command, uint32 commandLength, uint8 * result, uint32 resultLength);
121
122void rtcGetTime(uint8 * time);
123void rtcSetTime(uint8 * time);
124
125void rtcGetTimeAndDate(uint8 * time);
126void rtcSetTimeAndDate(uint8 * time);
127
128void rtcGetData(uint8 * data, uint32 size);
129
130void BCDToInteger(uint8 * data, uint32 length);
131void integerToBCD(uint8 * data, uint32 length);
132
133void initClockIRQ(void);
134
135#ifdef __cplusplus
136}
137#endif
138
139#endif
140
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