source: rtems/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h @ 4c4974e

4.104.115
Last change on this file since 4c4974e was 4c4974e, checked in by Sebastian Huber <sebastian.huber@…>, on 05/20/10 at 13:15:35

2010-05-20 Sebastian Huber <sebastian.huber@…>

  • make/custom/lpc32xx.inc, make/custom/lpc32xx_mzx_boot_int.cfg, startup/linkcmds.lpc32xx_mzx_boot_int: New files.
  • Makefile.am, configure.ac, preinstall.am, include/bsp.h, include/bspopts.h.in, include/lpc32xx.h, irq/irq.c, make/custom/lpc32xx_phycore.cfg, startup/bspstart.c, startup/bspstarthooks.c: Changes throughout.
  • Property mode set to 100644
File size: 8.0 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup lpc32xx_reg
5 *
6 * @brief Register base addresses.
7 */
8
9/*
10 * Copyright (c) 2009
11 * embedded brains GmbH
12 * Obere Lagerstr. 30
13 * D-82178 Puchheim
14 * Germany
15 * <rtems@embedded-brains.de>
16 *
17 * The license and distribution terms for this file may be
18 * found in the file LICENSE in this distribution or at
19 * http:
20 */
21
22#ifndef LIBBSP_ARM_LPC32XX_LPC32XX_H
23#define LIBBSP_ARM_LPC32XX_LPC32XX_H
24
25#include <stdint.h>
26
27/**
28 * @defgroup lpc32xx_reg Register Definitions
29 *
30 * @ingroup lpc32xx
31 *
32 * @brief Register definitions.
33 *
34 * @{
35 */
36
37/**
38 * @name Register Base Addresses
39 *
40 * @{
41 */
42
43#define LPC32XX_BASE_ADC 0x40048000
44#define LPC32XX_BASE_SYSCON 0x40004000
45#define LPC32XX_BASE_DEBUG_CTRL 0x40040000
46#define LPC32XX_BASE_DMA 0x31000000
47#define LPC32XX_BASE_EMC 0x31080000
48#define LPC32XX_BASE_EMC_CS_0 0xe0000000
49#define LPC32XX_BASE_EMC_CS_1 0xe1000000
50#define LPC32XX_BASE_EMC_CS_2 0xe2000000
51#define LPC32XX_BASE_EMC_CS_3 0xe3000000
52#define LPC32XX_BASE_EMC_DYCS_0 0x80000000
53#define LPC32XX_BASE_EMC_DYCS_1 0xa0000000
54#define LPC32XX_BASE_ETB_CFG 0x310c0000
55#define LPC32XX_BASE_ETB_DATA 0x310e0000
56#define LPC32XX_BASE_ETHERNET 0x31060000
57#define LPC32XX_BASE_GPIO 0x40028000
58#define LPC32XX_BASE_I2C_1 0x400a0000
59#define LPC32XX_BASE_I2C_2 0x400a8000
60#define LPC32XX_BASE_I2S_0 0x20094000
61#define LPC32XX_BASE_I2S_1 0x2009c000
62#define LPC32XX_BASE_IRAM 0x08000000
63#define LPC32XX_BASE_IROM 0x0c000000
64#define LPC32XX_BASE_KEYSCAN 0x40050000
65#define LPC32XX_BASE_LCD 0x31040000
66#define LPC32XX_BASE_MCPWM 0x400e8000
67#define LPC32XX_BASE_MIC 0x40008000
68#define LPC32XX_BASE_NAND_MLC 0x200a8000
69#define LPC32XX_BASE_NAND_SLC 0x20020000
70#define LPC32XX_BASE_PWM_1 0x4005c000
71#define LPC32XX_BASE_PWM_2 0x4005c004
72#define LPC32XX_BASE_PWM_3 0x4002c000
73#define LPC32XX_BASE_PWM_4 0x40030000
74#define LPC32XX_BASE_RTC 0x40024000
75#define LPC32XX_BASE_RTC_RAM 0x40024080
76#define LPC32XX_BASE_SDCARD 0x20098000
77#define LPC32XX_BASE_SIC_1 0x4000c000
78#define LPC32XX_BASE_SIC_2 0x40010000
79#define LPC32XX_BASE_SPI_1 0x20088000
80#define LPC32XX_BASE_SPI_2 0x20090000
81#define LPC32XX_BASE_SSP_0 0x20084000
82#define LPC32XX_BASE_SSP_1 0x2008c000
83#define LPC32XX_BASE_TIMER_0 0x40044000
84#define LPC32XX_BASE_TIMER_1 0x4004c000
85#define LPC32XX_BASE_TIMER_2 0x40058000
86#define LPC32XX_BASE_TIMER_3 0x40060000
87#define LPC32XX_BASE_TIMER_5 0x4002c000
88#define LPC32XX_BASE_TIMER_6 0x40030000
89#define LPC32XX_BASE_TIMER_HS 0x40038000
90#define LPC32XX_BASE_TIMER_MS 0x40034000
91#define LPC32XX_BASE_UART_1 0x40014000
92#define LPC32XX_BASE_UART_2 0x40018000
93#define LPC32XX_BASE_UART_3 0x40080000
94#define LPC32XX_BASE_UART_4 0x40088000
95#define LPC32XX_BASE_UART_5 0x40090000
96#define LPC32XX_BASE_UART_6 0x40098000
97#define LPC32XX_BASE_UART_7 0x4001c000
98#define LPC32XX_BASE_USB 0x31020000
99#define LPC32XX_BASE_USB_OTG_I2C 0x31020300
100#define LPC32XX_BASE_WDT 0x4003c000
101
102/** @} */
103
104/**
105 * @name Miscanellanous Registers
106 *
107 * @{
108 */
109
110#define LPC32XX_U3CLK (*(volatile uint32_t *) 0x400040d0)
111#define LPC32XX_U4CLK (*(volatile uint32_t *) 0x400040d4)
112#define LPC32XX_U5CLK (*(volatile uint32_t *) 0x400040d8)
113#define LPC32XX_U6CLK (*(volatile uint32_t *) 0x400040dc)
114#define LPC32XX_IRDACLK (*(volatile uint32_t *) 0x400040e0)
115#define LPC32XX_UART_CTRL (*(volatile uint32_t *) 0x40054000)
116#define LPC32XX_UART_CLKMODE (*(volatile uint32_t *) 0x40054004)
117#define LPC32XX_UART_LOOP (*(volatile uint32_t *) 0x40054008)
118#define LPC32XX_SW_INT (*(volatile uint32_t *) 0x400040a8)
119#define LPC32XX_MAC_CLK_CTRL (*(volatile uint32_t *) 0x40004090)
120#define LPC32XX_USB_DIV (*(volatile uint32_t *) 0x4000401c)
121#define LPC32XX_OTG_CLK_CTRL (*(volatile uint32_t *) 0x31020ff4)
122#define LPC32XX_OTG_CLK_STAT (*(volatile uint32_t *) 0x31020ff8)
123#define LPC32XX_OTG_STAT_CTRL (*(volatile uint32_t *) 0x31020110)
124#define LPC32XX_I2C_RX (*(volatile uint32_t *) 0x31020300)
125#define LPC32XX_I2C_TX (*(volatile uint32_t *) 0x31020300)
126#define LPC32XX_I2C_STS (*(volatile uint32_t *) 0x31020304)
127#define LPC32XX_I2C_CTL (*(volatile uint32_t *) 0x31020308)
128#define LPC32XX_I2C_CLKHI (*(volatile uint32_t *) 0x3102030c)
129#define LPC32XX_I2C_CLKLO (*(volatile uint32_t *) 0x31020310)
130#define LPC32XX_PWR_CTRL (*(volatile uint32_t *) 0x40004044)
131#define LPC32XX_OSC_CTRL (*(volatile uint32_t *) 0x4000404c)
132#define LPC32XX_SYSCLK_CTRL (*(volatile uint32_t *) 0x40004050)
133#define LPC32XX_PLL397_CTRL (*(volatile uint32_t *) 0x40004048)
134#define LPC32XX_HCLKPLL_CTRL (*(volatile uint32_t *) 0x40004058)
135#define LPC32XX_HCLKDIV_CTRL (*(volatile uint32_t *) 0x40004040)
136#define LPC32XX_TEST_CLK (*(volatile uint32_t *) 0x400040a4)
137#define LPC32XX_AUTOCLK_CTRL (*(volatile uint32_t *) 0x400040ec)
138#define LPC32XX_START_ER_PIN (*(volatile uint32_t *) 0x40004030)
139#define LPC32XX_START_ER_INT (*(volatile uint32_t *) 0x40004020)
140#define LPC32XX_P0_INTR_ER (*(volatile uint32_t *) 0x40004018)
141#define LPC32XX_START_SR_PIN (*(volatile uint32_t *) 0x40004038)
142#define LPC32XX_START_SR_INT (*(volatile uint32_t *) 0x40004028)
143#define LPC32XX_START_RSR_PIN (*(volatile uint32_t *) 0x40004034)
144#define LPC32XX_START_RSR_INT (*(volatile uint32_t *) 0x40004024)
145#define LPC32XX_START_APR_PIN (*(volatile uint32_t *) 0x4000403c)
146#define LPC32XX_START_APR_INT (*(volatile uint32_t *) 0x4000402c)
147#define LPC32XX_USB_CTRL (*(volatile uint32_t *) 0x40004064)
148#define LPC32XX_USBDIV_CTRL (*(volatile uint32_t *) 0x4000401c)
149#define LPC32XX_MS_CTRL (*(volatile uint32_t *) 0x40004080)
150#define LPC32XX_DMACLK_CTRL (*(volatile uint32_t *) 0x400040e8)
151#define LPC32XX_FLASHCLK_CTRL (*(volatile uint32_t *) 0x400040c8)
152#define LPC32XX_MACCLK_CTRL (*(volatile uint32_t *) 0x40004090)
153#define LPC32XX_LCDCLK_CTRL (*(volatile uint32_t *) 0x40004054)
154#define LPC32XX_I2S_CTRL (*(volatile uint32_t *) 0x4000407c)
155#define LPC32XX_SSP_CTRL (*(volatile uint32_t *) 0x40004078)
156#define LPC32XX_SPI_CTRL (*(volatile uint32_t *) 0x400040c4)
157#define LPC32XX_I2CCLK_CTRL (*(volatile uint32_t *) 0x400040ac)
158#define LPC32XX_TIMCLK_CTRL1 (*(volatile uint32_t *) 0x400040c0)
159#define LPC32XX_TIMCLK_CTRL (*(volatile uint32_t *) 0x400040bc)
160#define LPC32XX_ADCLK_CTRL (*(volatile uint32_t *) 0x400040b4)
161#define LPC32XX_ADCLK_CTRL1 (*(volatile uint32_t *) 0x40004060)
162#define LPC32XX_KEYCLK_CTRL (*(volatile uint32_t *) 0x400040b0)
163#define LPC32XX_PWMCLK_CTRL (*(volatile uint32_t *) 0x400040b8)
164#define LPC32XX_UARTCLK_CTRL (*(volatile uint32_t *) 0x400040e4)
165#define LPC32XX_POS0_IRAM_CTRl (*(volatile uint32_t *) 0x40004110)
166#define LPC32XX_POS1_IRAM_CTRl (*(volatile uint32_t *) 0x40004114)
167
168/** @} */
169
170/**
171 * @name GPIO Registers
172 *
173 * @{
174 */
175
176#define LPC32XX_P0_INP_STATE (*(volatile uint32_t *) 0x40028040)
177#define LPC32XX_P0_OUTP_SET (*(volatile uint32_t *) 0x40028044)
178#define LPC32XX_P0_OUTP_CLR (*(volatile uint32_t *) 0x40028048)
179#define LPC32XX_P0_DIR_SET (*(volatile uint32_t *) 0x40028050)
180#define LPC32XX_P0_DIR_CLR (*(volatile uint32_t *) 0x40028054)
181#define LPC32XX_P0_DIR_STATE (*(volatile uint32_t *) 0x40028058)
182#define LPC32XX_P0_OUTP_STATE (*(volatile uint32_t *) 0x4002804c)
183#define LPC32XX_P1_INP_STATE (*(volatile uint32_t *) 0x40028060)
184#define LPC32XX_P1_OUTP_SET (*(volatile uint32_t *) 0x40028064)
185#define LPC32XX_P1_OUTP_CLR (*(volatile uint32_t *) 0x40028068)
186#define LPC32XX_P1_DIR_SET (*(volatile uint32_t *) 0x40028070)
187#define LPC32XX_P1_DIR_CLR (*(volatile uint32_t *) 0x40028074)
188#define LPC32XX_P1_DIR_STATE (*(volatile uint32_t *) 0x40028078)
189#define LPC32XX_P1_OUTP_STATE (*(volatile uint32_t *) 0x4002806c)
190#define LPC32XX_P2_INP_STATE (*(volatile uint32_t *) 0x4002801c)
191#define LPC32XX_P2_OUTP_SET (*(volatile uint32_t *) 0x40028020)
192#define LPC32XX_P2_OUTP_CLR (*(volatile uint32_t *) 0x40028024)
193#define LPC32XX_P2_DIR_SET (*(volatile uint32_t *) 0x40028010)
194#define LPC32XX_P2_DIR_CLR (*(volatile uint32_t *) 0x40028014)
195#define LPC32XX_P2_DIR_STATE (*(volatile uint32_t *) 0x40028018)
196#define LPC32XX_P3_INP_STATE (*(volatile uint32_t *) 0x40028000)
197#define LPC32XX_P3_OUTP_SET (*(volatile uint32_t *) 0x40028004)
198#define LPC32XX_P3_OUTP_CLR (*(volatile uint32_t *) 0x40028008)
199#define LPC32XX_P3_OUTP_STATE (*(volatile uint32_t *) 0x4002800c)
200
201/** @} */
202
203/** @} */
204
205#endif /* LIBBSP_ARM_LPC32XX_LPC32XX_H */
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