1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup lpc32xx |
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5 | * |
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6 | * @brief High speed UART driver (14-clock). |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2010 |
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11 | * embedded brains GmbH |
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12 | * Obere Lagerstr. 30 |
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13 | * D-82178 Puchheim |
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14 | * Germany |
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15 | * <rtems@embedded-brains.de> |
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16 | * |
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17 | * The license and distribution terms for this file may be |
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18 | * found in the file LICENSE in this distribution or at |
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19 | * http://www.rtems.com/license/LICENSE. |
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20 | */ |
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21 | |
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22 | #include <rtems.h> |
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23 | #include <rtems/libio.h> |
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24 | #include <rtems/termiostypes.h> |
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25 | |
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26 | #include <libchip/serial.h> |
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27 | #include <libchip/sersupp.h> |
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28 | |
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29 | #include <bsp.h> |
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30 | #include <bsp/lpc32xx.h> |
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31 | #include <bsp/irq.h> |
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32 | |
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33 | typedef struct { |
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34 | uint32_t fifo; |
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35 | uint32_t level; |
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36 | uint32_t iir; |
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37 | uint32_t ctrl; |
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38 | uint32_t rate; |
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39 | } lpc32xx_hsu; |
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40 | |
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41 | #define HSU_FIFO_SIZE 64 |
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42 | |
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43 | #define HSU_LEVEL_RX_MASK 0xffU |
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44 | #define HSU_LEVEL_TX_MASK 0xff00U |
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45 | #define HSU_LEVEL_TX_SHIFT 8 |
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46 | |
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47 | #define HSU_RX_DATA_MASK 0xffU |
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48 | #define HSU_RX_EMPTY (1U << 8) |
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49 | #define HSU_RX_ERROR (1U << 9) |
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50 | #define HSU_RX_BREAK (1U << 10) |
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51 | |
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52 | #define HSU_IIR_TX (1U << 0) |
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53 | #define HSU_IIR_RX_TRIG (1U << 1) |
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54 | #define HSU_IIR_RX_TIMEOUT (1U << 2) |
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55 | |
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56 | #define HSU_CTRL_INTR_DISABLED 0x1280fU |
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57 | #define HSU_CTRL_RX_INTR_ENABLED 0x1284fU |
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58 | #define HSU_CTRL_RX_AND_TX_INTR_ENABLED 0x1286fU |
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59 | |
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60 | /* We are interested in RX timeout, RX trigger and TX trigger interrupts */ |
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61 | #define HSU_IIR_MASK 0x7U |
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62 | |
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63 | static int lpc32xx_hsu_first_open(int major, int minor, void *arg) |
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64 | { |
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65 | rtems_libio_open_close_args_t *oca = arg; |
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66 | struct rtems_termios_tty *tty = oca->iop->data1; |
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67 | console_tbl *ct = &Console_Port_Tbl [minor]; |
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68 | console_data *cd = &Console_Port_Data [minor]; |
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69 | volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1; |
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70 | |
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71 | cd->termios_data = tty; |
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72 | rtems_termios_set_initial_baud(tty, (int32_t) ct->pDeviceParams); |
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73 | hsu->ctrl = HSU_CTRL_RX_INTR_ENABLED; |
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74 | |
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75 | return 0; |
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76 | } |
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77 | |
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78 | static int lpc32xx_hsu_write(int minor, const char *buf, int len) |
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79 | { |
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80 | console_tbl *ct = &Console_Port_Tbl [minor]; |
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81 | console_data *cd = &Console_Port_Data [minor]; |
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82 | volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1; |
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83 | int tx_level = (hsu->level & HSU_LEVEL_TX_MASK) >> HSU_LEVEL_TX_SHIFT; |
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84 | int tx_free = HSU_FIFO_SIZE - tx_level; |
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85 | int i = 0; |
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86 | int out = len > tx_free ? tx_free : len; |
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87 | |
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88 | for (i = 0; i < out; ++i) { |
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89 | hsu->fifo = buf [i]; |
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90 | } |
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91 | |
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92 | if (len > 0) { |
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93 | cd->pDeviceContext = (void *) out; |
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94 | cd->bActive = true; |
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95 | hsu->ctrl = HSU_CTRL_RX_AND_TX_INTR_ENABLED; |
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96 | } |
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97 | |
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98 | return 0; |
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99 | } |
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100 | |
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101 | static void lpc32xx_hsu_interrupt_handler(void *arg) |
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102 | { |
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103 | int minor = (int) arg; |
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104 | console_tbl *ct = &Console_Port_Tbl [minor]; |
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105 | console_data *cd = &Console_Port_Data [minor]; |
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106 | volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1; |
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107 | |
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108 | /* Iterate until no more interrupts are pending */ |
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109 | do { |
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110 | int chars_to_dequeue = (int) cd->pDeviceContext; |
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111 | int rv = 0; |
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112 | int i = 0; |
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113 | char buf [HSU_FIFO_SIZE]; |
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114 | |
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115 | /* Enqueue received characters */ |
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116 | while (i < HSU_FIFO_SIZE) { |
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117 | uint32_t in = hsu->fifo; |
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118 | |
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119 | if ((in & HSU_RX_EMPTY) == 0) { |
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120 | if ((in & HSU_RX_BREAK) == 0) { |
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121 | buf [i] = in & HSU_RX_DATA_MASK; |
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122 | ++i; |
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123 | } |
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124 | } else { |
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125 | break; |
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126 | } |
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127 | } |
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128 | rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i); |
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129 | |
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130 | /* Dequeue transmitted characters */ |
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131 | cd->pDeviceContext = 0; |
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132 | rv = rtems_termios_dequeue_characters(cd->termios_data, chars_to_dequeue); |
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133 | if (rv == 0) { |
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134 | /* Nothing to transmit */ |
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135 | cd->bActive = false; |
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136 | hsu->ctrl = HSU_CTRL_RX_INTR_ENABLED; |
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137 | hsu->iir = HSU_IIR_TX; |
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138 | } |
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139 | } while ((hsu->iir & HSU_IIR_MASK) != 0); |
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140 | } |
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141 | |
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142 | static void lpc32xx_hsu_initialize(int minor) |
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143 | { |
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144 | console_tbl *ct = &Console_Port_Tbl [minor]; |
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145 | console_data *cd = &Console_Port_Data [minor]; |
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146 | volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1; |
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147 | |
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148 | hsu->ctrl = HSU_CTRL_INTR_DISABLED; |
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149 | |
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150 | cd->bActive = false; |
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151 | cd->pDeviceContext = 0; |
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152 | |
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153 | /* Drain FIFOs */ |
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154 | while (hsu->level != 0) { |
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155 | hsu->fifo; |
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156 | } |
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157 | |
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158 | rtems_interrupt_handler_install( |
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159 | ct->ulIntVector, |
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160 | "HSU", |
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161 | RTEMS_INTERRUPT_UNIQUE, |
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162 | lpc32xx_hsu_interrupt_handler, |
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163 | (void *) minor |
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164 | ); |
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165 | } |
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166 | |
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167 | static int lpc32xx_hsu_set_attributes(int minor, const struct termios *term) |
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168 | { |
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169 | console_tbl *ct = &Console_Port_Tbl [minor]; |
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170 | volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1; |
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171 | int baud_flags = term->c_cflag & CBAUD; |
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172 | |
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173 | if (baud_flags != 0) { |
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174 | int32_t baud = rtems_termios_baud_to_number(baud_flags); |
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175 | |
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176 | if (baud > 0) { |
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177 | uint32_t baud_divisor = 14 * (uint32_t) baud; |
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178 | uint32_t rate = LPC32XX_PERIPH_CLK / baud_divisor; |
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179 | uint32_t remainder = LPC32XX_PERIPH_CLK - rate * baud_divisor; |
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180 | |
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181 | if (2 * remainder >= baud_divisor) { |
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182 | ++rate; |
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183 | } |
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184 | |
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185 | hsu->rate = rate - 1; |
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186 | } |
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187 | } |
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188 | |
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189 | return 0; |
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190 | } |
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191 | |
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192 | console_fns lpc32xx_hsu_fns = { |
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193 | .deviceProbe = libchip_serial_default_probe, |
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194 | .deviceFirstOpen = lpc32xx_hsu_first_open, |
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195 | .deviceLastClose = NULL, |
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196 | .deviceRead = NULL, |
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197 | .deviceWrite = lpc32xx_hsu_write, |
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198 | .deviceInitialize = lpc32xx_hsu_initialize, |
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199 | .deviceWritePolled = NULL, |
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200 | .deviceSetAttributes = lpc32xx_hsu_set_attributes, |
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201 | .deviceOutputUsesInterrupts = true |
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202 | }; |
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