source: rtems/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_rom_int @ cbc433c7

4.115
Last change on this file since cbc433c7 was cbc433c7, checked in by Sebastian Huber <sebastian.huber@…>, on 11/25/14 at 07:40:20

bsps/arm: Add .nocache section

This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
  • Property mode set to 100644
File size: 1.0 KB
Line 
1/**
2 * @file
3 *
4 * @brief Memory map for PLX800 (LPC1778).
5 */
6
7MEMORY {
8        ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k
9        RAM_INT : ORIGIN = 0x10000000, LENGTH = 64k
10        RAM_PER : ORIGIN = 0x20000000, LENGTH = 32k
11        ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
12        RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
13}
14
15REGION_ALIAS ("REGION_START", ROM_INT);
16REGION_ALIAS ("REGION_VECTOR", RAM_INT);
17REGION_ALIAS ("REGION_TEXT", ROM_INT);
18REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
19REGION_ALIAS ("REGION_RODATA", ROM_INT);
20REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
21REGION_ALIAS ("REGION_DATA", RAM_EXT);
22REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
23REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
24REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
25REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
26REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
27REGION_ALIAS ("REGION_BSS", RAM_EXT);
28REGION_ALIAS ("REGION_WORK", RAM_EXT);
29REGION_ALIAS ("REGION_STACK", RAM_INT);
30REGION_ALIAS ("REGION_NOCACHE", RAM_INT);
31REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
32
33INCLUDE linkcmds.armv7m
Note: See TracBrowser for help on using the repository browser.