[5aeed17] | 1 | /** |
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| 2 | * @file |
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| 3 | * |
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| 4 | * @ingroup lpc24xx |
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| 5 | * |
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| 6 | * @brief Startup code. |
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| 7 | */ |
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| 8 | |
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| 9 | /* |
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[ba938b8d] | 10 | * Copyright (c) 2008, 2009 |
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| 11 | * embedded brains GmbH |
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[5aeed17] | 12 | * Obere Lagerstr. 30 |
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| 13 | * D-82178 Puchheim |
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| 14 | * Germany |
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[ba938b8d] | 15 | * <rtems@embedded-brains.de> |
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[5aeed17] | 16 | * |
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[ba938b8d] | 17 | * The license and distribution terms for this file may be |
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| 18 | * found in the file LICENSE in this distribution or at |
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| 19 | * http://www.rtems.com/license/LICENSE. |
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[5aeed17] | 20 | */ |
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| 21 | |
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| 22 | #include <bsp.h> |
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| 23 | #include <bsp/bootcard.h> |
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[29cc1477] | 24 | #include <bsp/dma.h> |
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[7ae2775] | 25 | #include <bsp/io.h> |
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| 26 | #include <bsp/irq-generic.h> |
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[5aeed17] | 27 | #include <bsp/irq.h> |
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| 28 | #include <bsp/linker-symbols.h> |
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| 29 | #include <bsp/lpc24xx.h> |
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[7ae2775] | 30 | #include <bsp/stackalloc.h> |
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[5aeed17] | 31 | #include <bsp/system-clocks.h> |
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| 32 | |
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[ba938b8d] | 33 | void bsp_start(void) |
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[9647f7fe] | 34 | { |
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[ba938b8d] | 35 | /* Initialize Timer 1 */ |
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| 36 | lpc24xx_module_enable(LPC24XX_MODULE_TIMER, 1, LPC24XX_MODULE_CCLK); |
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| 37 | |
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| 38 | /* Initialize standard timer */ |
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| 39 | lpc24xx_timer_initialize(); |
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| 40 | |
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| 41 | /* Initialize console */ |
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| 42 | #ifdef LPC24XX_CONFIG_CONSOLE |
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| 43 | lpc24xx_module_enable(LPC24XX_MODULE_UART, 0, LPC24XX_MODULE_CCLK); |
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| 44 | lpc24xx_io_config(LPC24XX_MODULE_UART, 0, LPC24XX_CONFIG_CONSOLE); |
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| 45 | U0LCR = 0; |
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| 46 | U0IER = 0; |
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| 47 | U0LCR = 0x80; |
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| 48 | U0DLL = lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD; |
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| 49 | U0DLM = 0; |
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| 50 | U0LCR = 0x03; |
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| 51 | U0FCR = 0x07; |
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[7ae2775] | 52 | #endif |
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[5aeed17] | 53 | |
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| 54 | /* Interrupts */ |
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| 55 | if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) { |
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[ba938b8d] | 56 | _CPU_Fatal_halt(0xe); |
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[5aeed17] | 57 | } |
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[29cc1477] | 58 | |
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| 59 | /* DMA */ |
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| 60 | lpc24xx_dma_initialize(); |
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[7ae2775] | 61 | |
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| 62 | /* Task stacks */ |
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| 63 | bsp_stack_initialize( |
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| 64 | bsp_section_stack_begin, |
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[ba938b8d] | 65 | (uintptr_t) bsp_section_stack_size |
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[7ae2775] | 66 | ); |
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| 67 | |
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| 68 | /* UART configurations */ |
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| 69 | #ifdef LPC24XX_CONFIG_UART_1 |
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[ba938b8d] | 70 | lpc24xx_module_enable(LPC24XX_MODULE_UART, 1, LPC24XX_MODULE_CCLK); |
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| 71 | lpc24xx_io_config(LPC24XX_MODULE_UART, 1, LPC24XX_CONFIG_UART_1); |
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[7ae2775] | 72 | #endif |
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| 73 | #ifdef LPC24XX_CONFIG_UART_2 |
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[ba938b8d] | 74 | lpc24xx_module_enable(LPC24XX_MODULE_UART, 2, LPC24XX_MODULE_CCLK); |
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| 75 | lpc24xx_io_config(LPC24XX_MODULE_UART, 2, LPC24XX_CONFIG_UART_2); |
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[7ae2775] | 76 | #endif |
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| 77 | #ifdef LPC24XX_CONFIG_UART_3 |
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[ba938b8d] | 78 | lpc24xx_module_enable(LPC24XX_MODULE_UART, 3, LPC24XX_MODULE_CCLK); |
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| 79 | lpc24xx_io_config(LPC24XX_MODULE_UART, 3, LPC24XX_CONFIG_UART_3); |
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[7ae2775] | 80 | #endif |
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[5aeed17] | 81 | } |
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| 82 | |
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| 83 | #define ULSR_THRE 0x00000020U |
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| 84 | |
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[ba938b8d] | 85 | static void lpc24xx_BSP_output_char(char c) |
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[5aeed17] | 86 | { |
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[ba938b8d] | 87 | while (IS_FLAG_CLEARED(U0LSR, ULSR_THRE)) { |
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[5aeed17] | 88 | /* Wait */ |
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| 89 | } |
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| 90 | U0THR = c; |
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| 91 | |
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| 92 | if (c == '\n') { |
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[ba938b8d] | 93 | while (IS_FLAG_CLEARED(U0LSR, ULSR_THRE)) { |
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[5aeed17] | 94 | /* Wait */ |
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| 95 | } |
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| 96 | U0THR = '\r'; |
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| 97 | } |
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| 98 | } |
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| 99 | |
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[29cc1477] | 100 | BSP_output_char_function_type BSP_output_char = lpc24xx_BSP_output_char; |
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