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bspreset-armv4.c @ b32a9cd

Last change on this file since b32a9cd was b32a9cd, checked in by Sebastian Huber <sebastian.huber@…>, on 01/12/16 at 13:44:10
bsps/arm: Use common ARMv7-M bsp_reset()
Property mode set to `100644`
File size: 918 bytes

Rev	Line
[949166d]	1	/**
	2	* @file
	3	*
	4	* @ingroup lpc24xx
	5	*
	6	* @brief Reset code.
	7	*/
	8
	9	/*
[2460cc7]	10	* Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved.
[949166d]	11	*
[14ee5a1e]	12	* embedded brains GmbH
	13	* Obere Lagerstr. 30
	14	* 82178 Puchheim
	15	* Germany
	16	* <rtems@embedded-brains.de>
	17	*
	18	* The license and distribution terms for this file may be
	19	* found in the file LICENSE in this distribution or at
[c499856]	20	* http://www.rtems.org/license/LICENSE.
[949166d]	21	*/
	22
[7ae2775]	23	#include <rtems.h>
[2460cc7]	24	#include <rtems/score/armv7m.h>
[7ae2775]	25
[949166d]	26	#include <bsp/bootcard.h>
[7ae2775]	27	#include <bsp/lpc24xx.h>
[4a6cc2a]	28	#include <bsp/start.h>
[949166d]	29
[b32a9cd]	30	#ifdef ARM_MULTILIB_ARCH_V4
	31
[4a6cc2a]	32	BSP_START_TEXT_SECTION __attribute__((flatten)) void bsp_reset(void)
[949166d]	33	{
[7ae2775]	34	rtems_interrupt_level level;
	35
[88d9f1cb]	36	(void) level;
[c468f18b]	37	rtems_interrupt_disable(level);
[7ae2775]	38
[b32a9cd]	39	/* Trigger watchdog reset */
	40	WDCLKSEL = 0;
	41	WDTC = 0xff;
	42	WDMOD = 0x3;
	43	WDFEED = 0xaa;
	44	WDFEED = 0x55;
[7ae2775]	45
	46	while (true) {
	47	/* Do nothing */
	48	}
[949166d]	49	}
[b32a9cd]	50
	51	#endif /* ARM_MULTILIB_ARCH_V4 */

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