source: rtems/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c @ ba938b8d

4.104.115
Last change on this file since ba938b8d was ba938b8d, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on 09/18/09 at 08:05:40

Changes throughout.

  • Property mode set to 100644
File size: 2.2 KB
RevLine 
[5aeed17]1/**
2 * @file
3 *
[ba938b8d]4 * @ingroup lpc24xx_clocks
[5aeed17]5 *
6 * @brief System clocks.
7 */
8
9/*
10 * Copyright (c) 2008
11 * Embedded Brains GmbH
12 * Obere Lagerstr. 30
13 * D-82178 Puchheim
14 * Germany
15 * rtems@embedded-brains.de
16 *
17 * The license and distribution terms for this file may be found in the file
18 * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
19 */
20
21#include <bsp.h>
[13995d1]22#include <bsp/utility.h>
[5aeed17]23#include <bsp/lpc24xx.h>
24#include <bsp/system-clocks.h>
25
26/**
27 * @brief Internal RC oscillator frequency in [Hz].
28 */
29#define LPC24XX_OSCILLATOR_INTERNAL 4000000U
30
[9647f7fe]31#ifndef LPC24XX_OSCILLATOR_MAIN
32  #error "unknown main oscillator frequency"
[3129783]33#endif
[5aeed17]34
[9647f7fe]35#ifndef LPC24XX_OSCILLATOR_RTC
36  #error "unknown RTC oscillator frequency"
[5aeed17]37#endif
38
[ba938b8d]39void lpc24xx_timer_initialize(void)
[9647f7fe]40{
[ba938b8d]41  /* Reset timer */
42  T1TCR = TCR_RST;
43
44  /* Set timer mode */
45  T1CTCR = 0;
[9647f7fe]46
47  /* Set prescaler to zero */
[ba938b8d]48  T1PR = 0;
[9647f7fe]49
50  /* Reset all interrupt flags */
51  T1IR = 0xff;
52
[ba938b8d]53  /* Do not stop on a match */
54  T1MCR = 0;
55
56  /* No captures */
57  T1CCR = 0;
[9647f7fe]58
59  /* Start timer */
[ba938b8d]60  T1TCR = TCR_EN;
[9647f7fe]61}
62
[ba938b8d]63void lpc24xx_micro_seconds_delay(unsigned us)
64{
65  unsigned start = lpc24xx_timer();
66  unsigned end = start + us * (lpc24xx_cclk() / 1000000);
67  unsigned now = 0;
68
69  do {
70    now = lpc24xx_timer();
71  } while (now < end);
72}
73
74unsigned lpc24xx_pllclk(void)
[5aeed17]75{
[ba938b8d]76  unsigned clksrc = GET_CLKSRCSEL_CLKSRC(CLKSRCSEL);
[5aeed17]77  unsigned pllinclk = 0;
78  unsigned pllclk = 0;
79
80  /* Get PLL input frequency */
81  switch (clksrc) {
82    case 0:
83      pllinclk = LPC24XX_OSCILLATOR_INTERNAL;
84      break;
85    case 1:
86      pllinclk = LPC24XX_OSCILLATOR_MAIN;
87      break;
88    case 2:
89      pllinclk = LPC24XX_OSCILLATOR_RTC;
90      break;
91    default:
92      return 0;
93  }
94
95  /* Get PLL output frequency */
[ba938b8d]96  if (IS_FLAG_SET(PLLSTAT, PLLSTAT_PLLC)) {
[5aeed17]97    uint32_t pllcfg = PLLCFG;
[ba938b8d]98    unsigned n = GET_PLLCFG_NSEL(pllcfg) + 1;
99    unsigned m = GET_PLLCFG_MSEL(pllcfg) + 1;
[5aeed17]100
101    pllclk = (pllinclk / n) * 2 * m;
102  } else {
103    pllclk = pllinclk;
104  }
105
[7ae2775]106  return pllclk;
107}
108
[ba938b8d]109unsigned lpc24xx_cclk(void)
[7ae2775]110{
111  /* Get PLL output frequency */
112  unsigned pllclk = lpc24xx_pllclk();
113
114  /* Get CPU frequency */
[ba938b8d]115  unsigned cclk = pllclk / (GET_CCLKCFG_CCLKSEL(CCLKCFG) + 1);
[5aeed17]116
117  return cclk;
118}
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