1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup lpc24xx_dma |
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5 | * |
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6 | * @brief Direct memory access (DMA) support. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2008, 2009 |
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11 | * embedded brains GmbH |
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12 | * Obere Lagerstr. 30 |
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13 | * D-82178 Puchheim |
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14 | * Germany |
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15 | * <rtems@embedded-brains.de> |
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16 | * |
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17 | * The license and distribution terms for this file may be |
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18 | * found in the file LICENSE in this distribution or at |
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19 | * http://www.rtems.org/license/LICENSE. |
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20 | */ |
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21 | |
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22 | #include <bsp/lpc24xx.h> |
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23 | #include <bsp/dma.h> |
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24 | #include <bsp/irq.h> |
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25 | |
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26 | static rtems_id lpc24xx_dma_sema_table [GPDMA_CH_NUMBER]; |
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27 | |
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28 | static bool lpc24xx_dma_status_table [GPDMA_CH_NUMBER]; |
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29 | |
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30 | static void lpc24xx_dma_copy_handler(void *arg) |
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31 | { |
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32 | /* Get interrupt status */ |
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33 | uint32_t tc = GPDMA_INT_TCSTAT; |
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34 | uint32_t err = GPDMA_INT_ERR_STAT; |
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35 | |
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36 | /* Clear interrupt status */ |
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37 | GPDMA_INT_TCCLR = tc; |
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38 | GPDMA_INT_ERR_CLR = err; |
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39 | |
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40 | /* Check channel 0 */ |
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41 | if ((tc & GPDMA_STATUS_CH_0) != 0) { |
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42 | rtems_semaphore_release(lpc24xx_dma_sema_table [0]); |
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43 | } |
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44 | lpc24xx_dma_status_table [0] = (err & GPDMA_STATUS_CH_0) == 0; |
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45 | |
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46 | /* Check channel 1 */ |
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47 | if ((tc & GPDMA_STATUS_CH_1) != 0) { |
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48 | rtems_semaphore_release(lpc24xx_dma_sema_table [1]); |
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49 | } |
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50 | lpc24xx_dma_status_table [1] = (err & GPDMA_STATUS_CH_1) == 0; |
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51 | } |
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52 | |
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53 | rtems_status_code lpc24xx_dma_copy_initialize(void) |
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54 | { |
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55 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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56 | rtems_id id0 = RTEMS_ID_NONE; |
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57 | rtems_id id1 = RTEMS_ID_NONE; |
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58 | |
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59 | /* Create semaphore for channel 0 */ |
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60 | sc = rtems_semaphore_create( |
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61 | rtems_build_name('D', 'M', 'A', '0'), |
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62 | 0, |
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63 | RTEMS_LOCAL | RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE, |
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64 | 0, |
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65 | &id0 |
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66 | ); |
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67 | if (sc != RTEMS_SUCCESSFUL) { |
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68 | return sc; |
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69 | } |
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70 | |
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71 | /* Create semaphore for channel 1 */ |
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72 | sc = rtems_semaphore_create( |
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73 | rtems_build_name('D', 'M', 'A', '1'), |
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74 | 0, |
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75 | RTEMS_LOCAL | RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE, |
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76 | 0, |
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77 | &id1 |
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78 | ); |
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79 | if (sc != RTEMS_SUCCESSFUL) { |
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80 | rtems_semaphore_delete(id0); |
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81 | |
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82 | return sc; |
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83 | } |
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84 | |
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85 | /* Install DMA interrupt handler */ |
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86 | sc = rtems_interrupt_handler_install( |
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87 | LPC24XX_IRQ_DMA, |
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88 | "DMA copy", |
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89 | RTEMS_INTERRUPT_UNIQUE, |
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90 | lpc24xx_dma_copy_handler, |
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91 | NULL |
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92 | ); |
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93 | if (sc != RTEMS_SUCCESSFUL) { |
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94 | rtems_semaphore_delete(id0); |
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95 | rtems_semaphore_delete(id1); |
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96 | |
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97 | return sc; |
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98 | } |
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99 | |
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100 | /* Initialize global data */ |
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101 | lpc24xx_dma_sema_table [0] = id0; |
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102 | lpc24xx_dma_sema_table [1] = id1; |
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103 | |
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104 | return RTEMS_SUCCESSFUL; |
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105 | } |
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106 | |
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107 | rtems_status_code lpc24xx_dma_copy_release(void) |
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108 | { |
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109 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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110 | rtems_status_code rsc = RTEMS_SUCCESSFUL; |
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111 | |
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112 | sc = rtems_interrupt_handler_remove( |
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113 | LPC24XX_IRQ_DMA, |
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114 | lpc24xx_dma_copy_handler, |
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115 | NULL |
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116 | ); |
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117 | if (sc != RTEMS_SUCCESSFUL) { |
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118 | rsc = sc; |
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119 | } |
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120 | |
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121 | sc = rtems_semaphore_delete(lpc24xx_dma_sema_table [0]); |
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122 | if (sc != RTEMS_SUCCESSFUL) { |
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123 | rsc = sc; |
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124 | } |
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125 | |
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126 | sc = rtems_semaphore_delete(lpc24xx_dma_sema_table [1]); |
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127 | if (sc != RTEMS_SUCCESSFUL) { |
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128 | rsc = sc; |
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129 | } |
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130 | |
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131 | return rsc; |
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132 | } |
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133 | |
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134 | rtems_status_code lpc24xx_dma_copy( |
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135 | unsigned channel, |
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136 | void *dest, |
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137 | const void *src, |
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138 | size_t n, |
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139 | size_t width |
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140 | ) |
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141 | { |
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142 | volatile lpc24xx_dma_channel *e = GPDMA_CH_BASE_ADDR(channel); |
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143 | uint32_t w = GPDMA_CH_CTRL_W_8; |
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144 | |
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145 | switch (width) { |
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146 | case 4: |
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147 | w = GPDMA_CH_CTRL_W_32; |
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148 | break; |
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149 | case 2: |
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150 | w = GPDMA_CH_CTRL_W_16; |
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151 | break; |
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152 | } |
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153 | |
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154 | n = n >> w; |
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155 | |
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156 | if (n > 0U && n < 4096U) { |
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157 | e->desc.src = (uint32_t) src; |
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158 | e->desc.dest = (uint32_t) dest; |
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159 | e->desc.lli = 0; |
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160 | e->desc.ctrl = SET_GPDMA_CH_CTRL_TSZ(0, n) |
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161 | | SET_GPDMA_CH_CTRL_SBSZ(0, GPDMA_CH_CTRL_BSZ_1) |
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162 | | SET_GPDMA_CH_CTRL_DBSZ(0, GPDMA_CH_CTRL_BSZ_1) |
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163 | | SET_GPDMA_CH_CTRL_SW(0, w) |
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164 | | SET_GPDMA_CH_CTRL_DW(0, w) |
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165 | | GPDMA_CH_CTRL_ITC |
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166 | | GPDMA_CH_CTRL_SI |
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167 | | GPDMA_CH_CTRL_DI; |
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168 | e->cfg = SET_GPDMA_CH_CFG_FLOW(0, GPDMA_CH_CFG_FLOW_MEM_TO_MEM_DMA) |
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169 | | GPDMA_CH_CFG_IE |
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170 | | GPDMA_CH_CFG_ITC |
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171 | | GPDMA_CH_CFG_EN; |
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172 | } else { |
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173 | return RTEMS_INVALID_SIZE; |
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174 | } |
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175 | |
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176 | return RTEMS_SUCCESSFUL; |
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177 | } |
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178 | |
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179 | rtems_status_code lpc24xx_dma_copy_wait(unsigned channel) |
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180 | { |
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181 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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182 | |
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183 | sc = rtems_semaphore_obtain( |
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184 | lpc24xx_dma_sema_table [channel], |
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185 | RTEMS_WAIT, |
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186 | RTEMS_NO_TIMEOUT |
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187 | ); |
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188 | if (sc != RTEMS_SUCCESSFUL) { |
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189 | return sc; |
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190 | } |
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191 | |
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192 | return lpc24xx_dma_status_table [channel] |
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193 | ? RTEMS_SUCCESSFUL : RTEMS_IO_ERROR; |
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194 | } |
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