source: rtems/c/src/lib/libbsp/arm/lpc24xx/include/io.h @ dd853a3

4.115
Last change on this file since dd853a3 was dd853a3, checked in by Sebastian Huber <sebastian.huber@…>, on Dec 3, 2010 at 9:56:48 AM

2010-12-03 Sebastian Huber <sebastian.huber@…>

  • include/lcd.h, misc/lcd.c: New files.
  • misc/io.c, include/io.h: Documentation, bug fixes, more configurations.
  • include/lpc24xx.h: Added DAC and I2S.
  • Makefile.am, bsp_specs, preinstall.am, startup/bspstarthooks.c, startup/linkcmds.lpc2362, startup/linkcmds.lpc23xx_tli800, startup/linkcmds.lpc24xx_ea, startup/linkcmds.lpc24xx_ncs_ram, startup/linkcmds.lpc24xx_ncs_rom_ext, startup/linkcmds.lpc24xx_ncs_rom_int: Update due to linker command file changes.
  • Property mode set to 100644
File size: 7.5 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup lpc24xx_io
5 *
6 * @brief Input and output module.
7 */
8
9/*
10 * Copyright (c) 2009
11 * embedded brains GmbH
12 * Obere Lagerstr. 30
13 * D-82178 Puchheim
14 * Germany
15 * <rtems@embedded-brains.de>
16 *
17 * The license and distribution terms for this file may be
18 * found in the file LICENSE in this distribution or at
19 * http://www.rtems.com/license/LICENSE.
20 */
21
22#ifndef LIBBSP_ARM_LPC24XX_IO_H
23#define LIBBSP_ARM_LPC24XX_IO_H
24
25#include <rtems.h>
26
27#include <bsp/lpc24xx.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif /* __cplusplus */
32
33/**
34 * @defgroup lpc24xx_io IO Support and Configuration
35 *
36 * @ingroup lpc24xx
37 *
38 * @brief Input and output module.
39 *
40 * <table>
41 *   <tr><th>Module</th><th>Configuration</th><th>First Pin</th><th>Last Pin</th></tr>
42 *   <tr><td>UART 0</td><td>0</td><td>P0.2</td><td>P0.3</td></tr>
43 *   <tr><td rowspan=3>UART 1</td><td>0</td><td>P0.15</td><td>P0.16</td></tr>
44 *   <tr><td>1</td><td>P2.0</td><td>P2.1</td></tr>
45 *   <tr><td>2</td><td>P3.16</td><td>P3.17</td></tr>
46 *   <tr><td rowspan=3>UART 2</td><td>0</td><td>P0.10</td><td>P0.11</td></tr>
47 *   <tr><td>1</td><td>P2.8</td><td>P2.9</td></tr>
48 *   <tr><td>2</td><td>P4.22</td><td>P4.23</td></tr>
49 *   <tr><td rowspan=3>UART 3</td><td>0</td><td>P0.0</td><td>P0.1</td></tr>
50 *   <tr><td>1</td><td>P0.25</td><td>P0.26</td></tr>
51 *   <tr><td>2</td><td>P4.28</td><td>P4.29</td></tr>
52 *   <tr><td rowspan=5>ETHERNET</td><td>0</td><td>P1.0</td><td>P1.17</td></tr>
53 *   <tr><td rowspan=4>1</td><td>P1.0</td><td>P1.1</td></tr>
54 *   <tr><td>P1.4</td><td>P1.4</td></tr>
55 *   <tr><td>P1.8</td><td>P1.10</td></tr>
56 *   <tr><td>P1.14</td><td>P1.17</td></tr>
57 *   <tr><td rowspan=4>ADC</td><td>0</td><td>P0.12</td><td>P0.13</td></tr>
58 *   <tr><td>1</td><td>P0.23</td><td>P0.25</td></tr>
59 *   <tr><td rowspan=2>2</td><td>P0.26</td><td>P0.26</td></tr>
60 *   <tr><td>P1.30</td><td>P1.31</td></tr>
61 *   <tr><td>I2C 0</td><td>0</td><td>P0.27</td><td>P0.28</td></tr>
62 *   <tr><td rowspan=3>I2C 1</td><td>0</td><td>P0.0</td><td>P0.1</td></tr>
63 *   <tr><td>1</td><td>P0.19</td><td>P0.20</td></tr>
64 *   <tr><td>2</td><td>P2.14</td><td>P2.15</td></tr>
65 *   <tr><td rowspan=3>I2C 2</td><td>0</td><td>P0.10</td><td>P0.11</td></tr>
66 *   <tr><td>1</td><td>P2.30</td><td>P2.31</td></tr>
67 *   <tr><td>2</td><td>P4.20</td><td>P4.21</td></tr>
68 *   <tr><td rowspan=3>I2S</td><td>0</td><td>P0.4</td><td>P0.9</td></tr>
69 *   <tr><td rowspan=2>1</td><td>P0.23</td><td>P0.25</td></tr>
70 *   <tr><td>P2.11</td><td>P2.13</td></tr>
71 *   <tr><td rowspan=5>SSP 0</td><td>0</td><td>P0.15</td><td>P0.18</td></tr>
72 *   <tr><td rowspan=2>1</td><td>P1.20</td><td>P0.21</td></tr>
73 *   <tr><td>P1.23</td><td>P0.24</td></tr>
74 *   <tr><td rowspan=2>2</td><td>P2.22</td><td>P2.23</td></tr>
75 *   <tr><td>P2.26</td><td>P2.27</td></tr>
76 *   <tr><td rowspan=5>SSP 1</td><td>0</td><td>P0.6</td><td>P0.9</td></tr>
77 *   <tr><td rowspan=3>1</td><td>P0.12</td><td>P0.13</td></tr>
78 *   <tr><td>P0.14</td><td>P0.14</td></tr>
79 *   <tr><td>P1.31</td><td>P1.31</td></tr>
80 *   <tr><td>2</td><td>P4.20</td><td>P4.23</td></tr>
81 *   <tr><td rowspan=2>USB</td><td rowspan=2>0</td><td>P0.29</td><td>P0.30</td></tr>
82 *   <tr><td>P1.19</td><td>P1.19</td></tr>
83 *   <tr><td>SPI</td><td>0</td><td>P0.15</td><td>P0.18</td></tr>
84 *   <tr><td>PWM 1</td><td>0</td><td>P2.0</td><td>P2.0</td></tr>
85 *   <tr><td rowspan=11>LCD</td><td rowspan=6>0</td><td>P0.4</td><td>P0.9</td></tr>
86 *   <tr><td>P1.20</td><td>P1.29</td></tr>
87 *   <tr><td>P2.0</td><td>P2.3</td></tr>
88 *   <tr><td>P2.5</td><td>P2.9</td></tr>
89 *   <tr><td>P2.12</td><td>P2.13</td></tr>
90 *   <tr><td>P4.28</td><td>P4.29</td></tr>
91 *   <tr><td rowspan=5>1</td><td>P1.20</td><td>P1.29</td></tr>
92 *   <tr><td>P2.0</td><td>P2.3</td></tr>
93 *   <tr><td>P2.5</td><td>P2.9</td></tr>
94 *   <tr><td>P2.12</td><td>P2.13</td></tr>
95 *   <tr><td>P4.28</td><td>P4.29</td></tr>
96 *   <tr><td>DAC</td><td>0</td><td>P0.26</td><td>P0.26</td></tr>
97 * </table>
98 *
99 * @{
100 */
101
102#define LPC24XX_IO_PORT_COUNT 5U
103
104#define LPC24XX_IO_INDEX_MAX (LPC24XX_IO_PORT_COUNT * 32U)
105
106#define LPC24XX_IO_INDEX_BY_PORT(port, bit) (((port) << 5U) + (bit))
107
108#define LPC24XX_IO_PORT(index) (index >> 5U)
109
110#define LPC24XX_IO_PORT_BIT(index) (index & 0x1fU)
111
112typedef enum {
113  LPC24XX_MODULE_ACF = 0,
114  LPC24XX_MODULE_ADC,
115  LPC24XX_MODULE_BAT_RAM,
116  LPC24XX_MODULE_CAN_0,
117  LPC24XX_MODULE_CAN_1,
118  LPC24XX_MODULE_DAC,
119  LPC24XX_MODULE_EMC,
120  LPC24XX_MODULE_ETHERNET,
121  LPC24XX_MODULE_GPDMA,
122  LPC24XX_MODULE_GPIO,
123  LPC24XX_MODULE_I2C_0,
124  LPC24XX_MODULE_I2C_1,
125  LPC24XX_MODULE_I2C_2,
126  LPC24XX_MODULE_I2S,
127  LPC24XX_MODULE_LCD,
128  LPC24XX_MODULE_MCI,
129  LPC24XX_MODULE_PCB,
130  LPC24XX_MODULE_PWM_0,
131  LPC24XX_MODULE_PWM_1,
132  LPC24XX_MODULE_RTC,
133  LPC24XX_MODULE_SPI,
134  LPC24XX_MODULE_SSP_0,
135  LPC24XX_MODULE_SSP_1,
136  LPC24XX_MODULE_SYSCON,
137  LPC24XX_MODULE_TIMER_0,
138  LPC24XX_MODULE_TIMER_1,
139  LPC24XX_MODULE_TIMER_2,
140  LPC24XX_MODULE_TIMER_3,
141  LPC24XX_MODULE_UART_0,
142  LPC24XX_MODULE_UART_1,
143  LPC24XX_MODULE_UART_2,
144  LPC24XX_MODULE_UART_3,
145  LPC24XX_MODULE_USB,
146  LPC24XX_MODULE_WDT
147} lpc24xx_module;
148
149#define LPC24XX_MODULE_FIRST LPC24XX_MODULE_ACF
150
151#define LPC24XX_MODULE_COUNT (LPC24XX_MODULE_WDT + 1)
152
153typedef enum {
154  LPC24XX_MODULE_PCLK_DEFAULT = 0x0U,
155  LPC24XX_MODULE_CCLK = 0x1U,
156  LPC24XX_MODULE_CCLK_2 = 0x2U,
157  LPC24XX_MODULE_CCLK_4 = 0x0U,
158  LPC24XX_MODULE_CCLK_6 = 0x3U,
159  LPC24XX_MODULE_CCLK_8 = 0x3U
160} lpc24xx_module_clock;
161
162#define LPC24XX_MODULE_CLOCK_MASK 0x3U
163
164typedef enum {
165  LPC24XX_GPIO_DEFAULT = 0x0U,
166  LPC24XX_GPIO_RESISTOR_DEFAULT = 0x0U,
167  LPC24XX_GPIO_RESISTOR_NONE = 0x1U,
168  LPC24XX_GPIO_RESISTOR_PULL_UP = 0x2U,
169  LPC24XX_GPIO_RESISTOR_PULL_DOWN = 0x3U,
170  LPC24XX_GPIO_INPUT = 0x0U,
171  LPC24XX_GPIO_OUTPUT = 0x8U
172} lpc24xx_gpio_settings;
173
174#define LPC24XX_GPIO_RESISTOR_MASK 0x3U
175
176rtems_status_code lpc24xx_module_enable(
177  lpc24xx_module module,
178  lpc24xx_module_clock clock
179);
180
181rtems_status_code lpc24xx_module_disable(
182  lpc24xx_module module
183);
184
185/**
186 * @brief Applies the configuration with index @a config for the @a module.
187 *
188 * The pin mode will not be altered.
189 *
190 * @retval RTEMS_SUCCESSFUL Successful operation.
191 * @retval RTEMS_INVALID_ID Invalid module or configuration.
192 */
193rtems_status_code lpc24xx_io_config(
194  lpc24xx_module module,
195  unsigned config
196);
197
198/**
199 * @brief Releases the configuration with index @a config for the @a module.
200 *
201 * The pins are set to general purpose IO function.  The pin mode will not be
202 * altered.
203 *
204 * @retval RTEMS_SUCCESSFUL Successful operation.
205 * @retval RTEMS_INVALID_ID Invalid module or configuration.
206 */
207rtems_status_code lpc24xx_io_release(
208  lpc24xx_module module,
209  unsigned config
210);
211
212rtems_status_code lpc24xx_gpio_config(
213  unsigned index,
214  lpc24xx_gpio_settings settings
215);
216
217static inline void lpc24xx_gpio_set(unsigned index)
218{
219  if (index <= LPC24XX_IO_INDEX_MAX) {
220    unsigned port = LPC24XX_IO_PORT(index);
221    unsigned bit = LPC24XX_IO_PORT_BIT(index);
222
223    LPC24XX_FIO [port].set = 1U << bit;
224  }
225}
226
227static inline void lpc24xx_gpio_clear(unsigned index)
228{
229  if (index <= LPC24XX_IO_INDEX_MAX) {
230    unsigned port = LPC24XX_IO_PORT(index);
231    unsigned bit = LPC24XX_IO_PORT_BIT(index);
232
233    LPC24XX_FIO [port].clr = 1U << bit;
234  }
235}
236
237static inline void lpc24xx_gpio_write(unsigned index, bool value)
238{
239  if (value) {
240    lpc24xx_gpio_set(index);
241  } else {
242    lpc24xx_gpio_clear(index);
243  }
244}
245
246static inline bool lpc24xx_gpio_get(unsigned index)
247{
248  if (index <= LPC24XX_IO_INDEX_MAX) {
249    unsigned port = LPC24XX_IO_PORT(index);
250    unsigned bit = LPC24XX_IO_PORT_BIT(index);
251
252    return (LPC24XX_FIO [port].pin & (1U << bit)) != 0;
253  } else {
254    return false;
255  }
256}
257
258/** @} */
259
260#ifdef __cplusplus
261}
262#endif /* __cplusplus */
263
264#endif /* LIBBSP_ARM_LPC24XX_IO_H */
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