1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup lpc24xx_libi2c |
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5 | * |
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6 | * @brief LibI2C bus driver for the I2C modules. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Obere Lagerstr. 30 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.org/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #include <bsp.h> |
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24 | #include <bsp/i2c.h> |
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25 | #include <bsp/irq.h> |
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26 | #include <bsp/irq-generic.h> |
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27 | #include <bsp/system-clocks.h> |
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28 | |
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29 | #define RTEMS_STATUS_CHECKS_USE_PRINTK |
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30 | |
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31 | #include <rtems/status-checks.h> |
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32 | |
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33 | static void lpc24xx_i2c_handler(void *arg) |
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34 | { |
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35 | lpc24xx_i2c_bus_entry *e = arg; |
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36 | volatile lpc24xx_i2c *regs = e->regs; |
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37 | unsigned state = regs->stat; |
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38 | uint8_t *data = e->data; |
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39 | uint8_t *end = e->end; |
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40 | bool notify = true; |
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41 | |
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42 | switch (state) { |
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43 | case 0x28U: |
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44 | /* Data has been transmitted successfully */ |
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45 | if (data != end) { |
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46 | regs->dat = *data; |
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47 | ++data; |
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48 | regs->conset = LPC24XX_I2C_AA; |
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49 | regs->conclr = LPC24XX_I2C_SI; |
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50 | notify = false; |
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51 | e->data = data; |
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52 | } |
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53 | break; |
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54 | case 0x50U: |
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55 | /* Data has been received */ |
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56 | if (data != end) { |
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57 | *data = (uint8_t) regs->dat; |
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58 | ++data; |
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59 | if (data != end) { |
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60 | if (data + 1 != end) { |
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61 | regs->conset = LPC24XX_I2C_AA; |
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62 | } else { |
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63 | regs->conclr = LPC24XX_I2C_AA; |
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64 | } |
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65 | regs->conclr = LPC24XX_I2C_SI; |
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66 | notify = false; |
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67 | e->data = data; |
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68 | } else { |
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69 | /* This is an error and should never happen */ |
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70 | } |
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71 | } |
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72 | break; |
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73 | case 0x58U: |
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74 | /* Last data has been received */ |
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75 | if (data != end) { |
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76 | *data = (uint8_t) regs->dat; |
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77 | } |
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78 | break; |
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79 | default: |
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80 | /* Do nothing */ |
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81 | break; |
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82 | } |
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83 | |
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84 | /* Notify task if necessary */ |
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85 | if (notify) { |
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86 | bsp_interrupt_vector_disable(e->vector); |
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87 | |
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88 | rtems_semaphore_release(e->state_update); |
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89 | } |
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90 | } |
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91 | |
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92 | static rtems_status_code lpc24xx_i2c_wait(lpc24xx_i2c_bus_entry *e) |
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93 | { |
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94 | bsp_interrupt_vector_enable(e->vector); |
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95 | |
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96 | return rtems_semaphore_obtain(e->state_update, RTEMS_WAIT, RTEMS_NO_TIMEOUT); |
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97 | } |
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98 | |
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99 | static rtems_status_code lpc24xx_i2c_init(rtems_libi2c_bus_t *bus) |
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100 | { |
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101 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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102 | lpc24xx_i2c_bus_entry *e = (lpc24xx_i2c_bus_entry *) bus; |
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103 | volatile lpc24xx_i2c *regs = e->regs; |
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104 | unsigned cycles = LPC24XX_CCLK / (8U * 100000U * 2U); |
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105 | |
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106 | /* Create semaphore */ |
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107 | sc = rtems_semaphore_create ( |
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108 | rtems_build_name ('I', '2', 'C', '0' + e->index), |
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109 | 0, |
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110 | RTEMS_SIMPLE_BINARY_SEMAPHORE, |
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111 | 0, |
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112 | &e->state_update |
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113 | ); |
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114 | RTEMS_CHECK_SC(sc, "create status update semaphore"); |
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115 | |
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116 | /* Enable module power */ |
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117 | sc = lpc24xx_module_enable(LPC24XX_MODULE_I2C_0 + e->index, LPC24XX_MODULE_CCLK_8); |
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118 | RTEMS_CHECK_SC(sc, "enable module"); |
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119 | |
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120 | /* Pin configuration */ |
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121 | sc = lpc24xx_pin_config(e->pins, LPC24XX_PIN_SET_FUNCTION); |
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122 | RTEMS_CHECK_SC(sc, "pin configuration"); |
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123 | |
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124 | /* Clock high and low duty cycles */ |
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125 | regs->sclh = cycles; |
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126 | regs->scll = cycles; |
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127 | |
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128 | /* Disable module */ |
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129 | regs->conclr = LPC24XX_I2C_EN; |
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130 | |
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131 | /* Install interrupt handler and disable this vector */ |
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132 | sc = rtems_interrupt_handler_install( |
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133 | e->vector, |
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134 | "I2C", |
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135 | RTEMS_INTERRUPT_UNIQUE, |
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136 | lpc24xx_i2c_handler, |
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137 | e |
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138 | ); |
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139 | RTEMS_CHECK_SC(sc, "install interrupt handler"); |
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140 | bsp_interrupt_vector_disable(e->vector); |
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141 | |
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142 | /* Enable module in master mode */ |
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143 | regs->conset = LPC24XX_I2C_EN; |
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144 | |
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145 | /* Set self address */ |
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146 | regs->adr = 0; |
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147 | |
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148 | return RTEMS_SUCCESSFUL; |
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149 | } |
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150 | |
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151 | static rtems_status_code lpc24xx_i2c_send_start(rtems_libi2c_bus_t *bus) |
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152 | { |
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153 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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154 | lpc24xx_i2c_bus_entry *e = (lpc24xx_i2c_bus_entry *) bus; |
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155 | volatile lpc24xx_i2c *regs = e->regs; |
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156 | |
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157 | /* Start */ |
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158 | regs->conclr = LPC24XX_I2C_STA | LPC24XX_I2C_AA | LPC24XX_I2C_SI; |
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159 | regs->conset = LPC24XX_I2C_STA; |
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160 | |
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161 | /* Wait */ |
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162 | sc = lpc24xx_i2c_wait(e); |
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163 | RTEMS_CHECK_SC(sc, "wait for state update"); |
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164 | |
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165 | return RTEMS_SUCCESSFUL; |
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166 | } |
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167 | |
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168 | static rtems_status_code lpc24xx_i2c_send_stop(rtems_libi2c_bus_t *bus) |
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169 | { |
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170 | lpc24xx_i2c_bus_entry *e = (lpc24xx_i2c_bus_entry *) bus; |
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171 | volatile lpc24xx_i2c *regs = e->regs; |
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172 | |
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173 | /* Stop */ |
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174 | regs->conset = LPC24XX_I2C_STO | LPC24XX_I2C_AA; |
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175 | regs->conclr = LPC24XX_I2C_STA | LPC24XX_I2C_SI; |
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176 | |
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177 | return RTEMS_SUCCESSFUL; |
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178 | } |
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179 | |
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180 | static rtems_status_code lpc24xx_i2c_send_addr( |
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181 | rtems_libi2c_bus_t *bus, |
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182 | uint32_t addr, |
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183 | int rw |
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184 | ) |
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185 | { |
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186 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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187 | lpc24xx_i2c_bus_entry *e = (lpc24xx_i2c_bus_entry *) bus; |
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188 | volatile lpc24xx_i2c *regs = e->regs; |
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189 | unsigned state = regs->stat; |
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190 | |
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191 | /* Check state */ |
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192 | if (state != 0x8U && state != 0x10U) { |
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193 | return -RTEMS_IO_ERROR; |
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194 | } |
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195 | |
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196 | /* Send address */ |
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197 | regs->dat = (uint8_t) ((addr << 1U) | ((rw != 0) ? 1U : 0U)); |
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198 | regs->conset = LPC24XX_I2C_AA; |
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199 | regs->conclr = LPC24XX_I2C_STA | LPC24XX_I2C_SI; |
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200 | |
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201 | /* Wait */ |
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202 | sc = lpc24xx_i2c_wait(e); |
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203 | RTEMS_CHECK_SC_RV(sc, "wait for state update"); |
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204 | |
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205 | /* Check state */ |
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206 | state = regs->stat; |
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207 | if (state != 0x18U && state != 0x40U) { |
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208 | return -RTEMS_IO_ERROR; |
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209 | } |
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210 | |
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211 | return RTEMS_SUCCESSFUL; |
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212 | } |
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213 | |
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214 | static int lpc24xx_i2c_read(rtems_libi2c_bus_t *bus, unsigned char *in, int n) |
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215 | { |
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216 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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217 | lpc24xx_i2c_bus_entry *e = (lpc24xx_i2c_bus_entry *) bus; |
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218 | volatile lpc24xx_i2c *regs = e->regs; |
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219 | unsigned state = regs->stat; |
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220 | uint8_t *data = in; |
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221 | uint8_t *end = in + n; |
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222 | |
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223 | if (n <= 0) { |
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224 | return n; |
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225 | } else if (state != 0x40U) { |
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226 | return -RTEMS_IO_ERROR; |
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227 | } |
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228 | |
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229 | /* Setup receive buffer */ |
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230 | e->data = data; |
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231 | e->end = end; |
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232 | |
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233 | /* Ready to receive data */ |
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234 | if (data + 1 != end) { |
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235 | regs->conset = LPC24XX_I2C_AA; |
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236 | } else { |
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237 | regs->conclr = LPC24XX_I2C_AA; |
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238 | } |
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239 | regs->conclr = LPC24XX_I2C_SI; |
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240 | |
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241 | /* Wait */ |
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242 | sc = lpc24xx_i2c_wait(e); |
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243 | RTEMS_CHECK_SC_RV(sc, "wait for state update"); |
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244 | |
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245 | /* Check state */ |
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246 | state = regs->stat; |
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247 | if (state != 0x58U) { |
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248 | return -RTEMS_IO_ERROR; |
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249 | } |
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250 | |
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251 | return n; |
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252 | } |
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253 | |
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254 | static int lpc24xx_i2c_write( |
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255 | rtems_libi2c_bus_t *bus, |
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256 | unsigned char *out, |
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257 | int n |
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258 | ) |
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259 | { |
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260 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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261 | lpc24xx_i2c_bus_entry *e = (lpc24xx_i2c_bus_entry *) bus; |
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262 | volatile lpc24xx_i2c *regs = e->regs; |
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263 | unsigned state = 0; |
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264 | |
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265 | if (n <= 0) { |
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266 | return n; |
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267 | } |
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268 | |
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269 | /* Setup transmit buffer */ |
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270 | e->data = out + 1; |
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271 | e->end = out + n; |
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272 | |
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273 | /* Transmit first byte */ |
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274 | regs->dat = *out; |
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275 | regs->conset = LPC24XX_I2C_AA; |
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276 | regs->conclr = LPC24XX_I2C_SI; |
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277 | |
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278 | /* Wait */ |
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279 | sc = lpc24xx_i2c_wait(e); |
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280 | RTEMS_CHECK_SC_RV(sc, "wait for state update"); |
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281 | |
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282 | /* Check state */ |
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283 | state = regs->stat; |
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284 | if (state != 0x28U) { |
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285 | return -RTEMS_IO_ERROR; |
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286 | } |
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287 | |
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288 | return n; |
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289 | } |
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290 | |
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291 | static int lpc24xx_i2c_set_transfer_mode( |
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292 | rtems_libi2c_bus_t *bus, |
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293 | const rtems_libi2c_tfr_mode_t *mode |
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294 | ) |
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295 | { |
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296 | return -RTEMS_NOT_IMPLEMENTED; |
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297 | } |
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298 | |
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299 | static int lpc24xx_i2c_ioctl(rtems_libi2c_bus_t *bus, int cmd, void *arg) |
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300 | { |
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301 | int rv = -1; |
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302 | const rtems_libi2c_tfr_mode_t *tm = (const rtems_libi2c_tfr_mode_t *) arg; |
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303 | |
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304 | switch (cmd) { |
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305 | case RTEMS_LIBI2C_IOCTL_SET_TFRMODE: |
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306 | rv = lpc24xx_i2c_set_transfer_mode(bus, tm); |
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307 | break; |
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308 | default: |
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309 | rv = -RTEMS_NOT_DEFINED; |
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310 | break; |
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311 | } |
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312 | |
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313 | return rv; |
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314 | } |
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315 | |
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316 | const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops = { |
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317 | .init = lpc24xx_i2c_init, |
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318 | .send_start = lpc24xx_i2c_send_start, |
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319 | .send_stop = lpc24xx_i2c_send_stop, |
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320 | .send_addr = lpc24xx_i2c_send_addr, |
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321 | .read_bytes = lpc24xx_i2c_read, |
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322 | .write_bytes = lpc24xx_i2c_write, |
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323 | .ioctl = lpc24xx_i2c_ioctl |
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324 | }; |
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