source: rtems/c/src/lib/libbsp/arm/lpc176x/misc/system-clocks.c @ 425fe40d

4.115
Last change on this file since 425fe40d was 19260fb, checked in by Martin Boretto <martin.boretto@…>, on Jun 9, 2014 at 2:27:18 PM

bsp/lpc176x: New BSP

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup lpc176x_clocks
5 *
6 * @brief System clocks.
7 */
8
9/*
10 * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Obere Lagerstr. 30
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.com/license/LICENSE.
21 */
22
23#include <bsp.h>
24#include <bsp/system-clocks.h>
25
26/**
27 * @brief Internal RC oscillator frequency in [Hz].
28 */
29#define LPC176X_OSCILLATOR_INTERNAL 4000000u
30
31#ifndef LPC176X_OSCILLATOR_MAIN
32#error "unknown main oscillator frequency"
33#endif
34
35#ifndef LPC176X_OSCILLATOR_RTC
36#error "unknown RTC oscillator frequency"
37#endif
38
39inline unsigned lpc176x_sysclk( void );
40
41void lpc176x_timer_initialize( void )
42{
43  /* Reset timer */
44  LPC176X_T1TCR = TCR_RST;
45  /* Set timer mode */
46  LPC176X_T1CTCR = 0u;
47  /* Set prescaler to zero */
48  LPC176X_T1PR = 0u;
49  /* Reset all interrupt flags */
50  LPC176X_T1IR = 0xffU;
51  /* Do not stop on a match */
52  LPC176X_T1MCR = 0u;
53  /* No captures */
54  LPC176X_T1CCR = 0u;
55  /* Start timer */
56  LPC176X_T1TCR = TCR_EN;
57}
58
59void lpc176x_micro_seconds_delay( const unsigned us )
60{
61  const unsigned start = lpc176x_get_timer1();
62  const unsigned delay = us * ( LPC176X_PCLK / 1000000u );
63  unsigned       elapsed = 0u;
64
65  do {
66    elapsed = lpc176x_get_timer1() - start;
67  } while ( elapsed < delay );
68}
69
70unsigned lpc176x_sysclk( void )
71{
72  return ( LPC176X_SCB.clksrcsel & LPC176X_SCB_CLKSRCSEL_CLKSRC ) != 0u ?
73         LPC176X_OSCILLATOR_MAIN : LPC176X_OSCILLATOR_INTERNAL;
74}
75
76unsigned lpc176x_pllclk( void )
77{
78  const unsigned sysclk = lpc176x_sysclk();
79  const unsigned pllstat = ( LPC176X_SCB.pll_0 ).stat;
80  const unsigned enabled_and_locked = LPC176X_PLL_STAT_PLLE |
81                                      LPC176X_PLL_STAT_PLOCK;
82  unsigned pllclk = 0u;
83
84  if ( ( pllstat & enabled_and_locked ) == enabled_and_locked ) {
85    unsigned m = LPC176X_PLL_SEL_MSEL_GET( pllstat ) + 1u;
86    pllclk = sysclk * m;
87  }
88
89  /* else implies that the pllstat is unlocked. Also,
90     there is nothing to do. */
91
92  return pllclk;
93}
94
95unsigned lpc176x_cclk( void )
96{
97  const unsigned cclksel = LPC176X_SCB.cclksel;
98  unsigned       cclk_in = 0u;
99  unsigned       cclk = 0u;
100
101  if ( ( cclksel & LPC176X_SCB_CCLKSEL_CCLKSEL ) != 0u ) {
102    cclk_in = lpc176x_pllclk();
103  } else {
104    cclk_in = lpc176x_sysclk();
105  }
106
107  cclk = cclk_in / LPC176X_SCB_CCLKSEL_CCLKDIV_GET( cclksel );
108
109  return cclk;
110}
111
112CPU_Counter_ticks _CPU_Counter_read( void )
113{
114  return lpc176x_get_timer1();
115}
116
117inline CPU_Counter_ticks _CPU_Counter_difference(
118  CPU_Counter_ticks second,
119  CPU_Counter_ticks first
120)
121{
122  return second - first;
123}
124
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