1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup lpc176x_dma |
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5 | * |
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6 | * @brief Direct memory access (DMA) support. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Obere Lagerstr. 30 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.com/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #include <rtems/endian.h> |
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24 | #include <bsp/dma.h> |
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25 | #include <bsp/io.h> |
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26 | |
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27 | /** |
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28 | * @brief Table that indicates if a channel is currently occupied. |
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29 | */ |
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30 | static bool lpc176x_dma_channel_occupation[ GPDMA_CH_NUMBER ]; |
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31 | |
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32 | void lpc176x_dma_initialize( void ) |
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33 | { |
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34 | /* Enable module power */ |
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35 | lpc176x_module_enable( LPC176X_MODULE_GPDMA, LPC176X_MODULE_PCLK_DEFAULT ); |
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36 | |
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37 | /* Disable module */ |
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38 | GPDMA_CONFIG = 0u; |
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39 | |
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40 | /* Reset registers */ |
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41 | GPDMA_SOFT_SREQ = 0u; |
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42 | GPDMA_SOFT_BREQ = 0u; |
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43 | GPDMA_SOFT_LSREQ = 0u; |
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44 | GPDMA_SOFT_LBREQ = 0u; |
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45 | GPDMA_SYNC = 0u; |
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46 | GPDMA_CH0_CFG = 0u; |
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47 | GPDMA_CH1_CFG = 0u; |
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48 | |
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49 | /* Enable module */ |
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50 | #if BYTE_ORDER == LITTLE_ENDIAN |
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51 | GPDMA_CONFIG = GPDMA_CONFIG_EN; |
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52 | #else |
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53 | GPDMA_CONFIG = GPDMA_CONFIG_EN | GPDMA_CONFIG_MODE; |
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54 | #endif |
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55 | } |
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56 | |
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57 | rtems_status_code lpc176x_dma_channel_obtain( const unsigned channel ) |
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58 | { |
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59 | rtems_status_code status_code = RTEMS_INVALID_ID; |
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60 | |
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61 | if ( channel < GPDMA_CH_NUMBER ) { |
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62 | rtems_interrupt_level level = 0u; |
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63 | bool occupation = true; |
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64 | |
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65 | rtems_interrupt_disable( level ); |
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66 | occupation = lpc176x_dma_channel_occupation[ channel ]; |
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67 | lpc176x_dma_channel_occupation[ channel ] = true; |
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68 | rtems_interrupt_enable( level ); |
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69 | |
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70 | status_code = occupation ? RTEMS_RESOURCE_IN_USE : RTEMS_SUCCESSFUL; |
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71 | } |
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72 | |
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73 | /* else implies that the channel is not valid. Also, |
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74 | there is nothing to do. */ |
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75 | |
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76 | return status_code; |
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77 | } |
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78 | |
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79 | void lpc176x_dma_channel_release( const unsigned channel ) |
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80 | { |
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81 | if ( channel < GPDMA_CH_NUMBER ) { |
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82 | lpc176x_dma_channel_occupation[ channel ] = false; |
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83 | } |
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84 | |
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85 | /* else implies that the channel is not valid. Also, |
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86 | there is nothing to do. */ |
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87 | } |
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88 | |
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89 | void lpc176x_dma_channel_disable( |
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90 | const unsigned channel, |
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91 | const bool force |
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92 | ) |
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93 | { |
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94 | if ( channel < GPDMA_CH_NUMBER ) { |
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95 | volatile lpc176x_dma_channel *ch = GPDMA_CH_BASE_ADDR( channel ); |
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96 | uint32_t cfg = ch->cfg; |
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97 | |
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98 | if ( !force ) { |
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99 | /* Halt */ |
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100 | ch->cfg |= GPDMA_CH_CFG_HALT; |
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101 | |
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102 | /* Wait for inactive */ |
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103 | do { |
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104 | cfg = ch->cfg; |
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105 | } while ( ( cfg & GPDMA_CH_CFG_ACTIVE ) != 0u ); |
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106 | } |
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107 | |
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108 | /* else implies that the channel is not to be forced. Also, |
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109 | there is nothing to do. */ |
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110 | |
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111 | /* Disable */ |
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112 | ch->cfg &= ~GPDMA_CH_CFG_EN; |
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113 | } |
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114 | |
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115 | /* else implies that the channel is not valid. Also, |
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116 | there is nothing to do. */ |
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117 | } |
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