1 | /* |
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2 | * Copyright © 2013 Eugeniy Meshcheryakov <eugen@debian.org> |
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3 | * |
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4 | * The license and distribution terms for this file may be |
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5 | * found in the file LICENSE in this distribution or at |
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6 | * http://www.rtems.com/license/LICENSE. |
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7 | */ |
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8 | |
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9 | #include <bsp/syscon.h> |
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10 | #include <bsp/lm3s69xx.h> |
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11 | #include <rtems.h> |
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12 | |
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13 | static void delay_3_clocks(void) |
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14 | { |
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15 | asm volatile( |
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16 | "nop\n\t" |
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17 | "nop\n\t" |
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18 | "nop"); |
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19 | } |
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20 | |
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21 | void lm3s69xx_syscon_enable_gpio_clock(unsigned int port, bool enable) |
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22 | { |
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23 | volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON; |
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24 | uint32_t mask = 1 << port; |
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25 | rtems_interrupt_level level; |
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26 | |
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27 | rtems_interrupt_disable(level); |
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28 | |
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29 | if (enable) |
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30 | syscon->rcgc2 |= mask; |
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31 | else |
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32 | syscon->rcgc2 &= ~mask; |
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33 | |
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34 | delay_3_clocks(); |
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35 | |
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36 | rtems_interrupt_enable(level); |
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37 | } |
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38 | |
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39 | void lm3s69xx_syscon_enable_uart_clock(unsigned int port, bool enable) |
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40 | { |
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41 | volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON; |
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42 | uint32_t mask = 1 << port; |
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43 | rtems_interrupt_level level; |
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44 | |
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45 | rtems_interrupt_disable(level); |
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46 | |
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47 | if (enable) |
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48 | syscon->rcgc1 |= mask; |
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49 | else |
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50 | syscon->rcgc1 &= ~mask; |
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51 | |
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52 | delay_3_clocks(); |
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53 | |
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54 | rtems_interrupt_enable(level); |
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55 | } |
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56 | |
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57 | void lm3s69xx_syscon_enable_ssi_clock(unsigned int port, bool enable) |
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58 | { |
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59 | volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON; |
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60 | uint32_t mask = 1 << (port + 4); |
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61 | rtems_interrupt_level level; |
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62 | |
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63 | rtems_interrupt_disable(level); |
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64 | |
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65 | if (enable) |
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66 | syscon->rcgc1 |= mask; |
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67 | else |
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68 | syscon->rcgc1 &= ~mask; |
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69 | |
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70 | delay_3_clocks(); |
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71 | |
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72 | rtems_interrupt_enable(level); |
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73 | } |
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74 | |
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75 | void lm3s69xx_syscon_enable_pwm_clock(bool enable) |
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76 | { |
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77 | volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON; |
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78 | rtems_interrupt_level level; |
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79 | |
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80 | rtems_interrupt_disable(level); |
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81 | |
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82 | if (enable) |
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83 | syscon->rcgc0 |= SYSCONRCGC0_PWM; |
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84 | else |
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85 | syscon->rcgc0 &= ~SYSCONRCGC0_PWM; |
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86 | |
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87 | delay_3_clocks(); |
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88 | |
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89 | rtems_interrupt_enable(level); |
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90 | } |
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91 | |
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92 | /** |
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93 | * Sets PWMDIV field in the RCC register. |
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94 | * |
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95 | * @note div should be one of SCRCC_PWMDIV_DIV?_VAL constants. |
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96 | */ |
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97 | void lm3s69xx_syscon_set_pwmdiv(unsigned int div) |
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98 | { |
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99 | volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON; |
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100 | rtems_interrupt_level level; |
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101 | |
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102 | rtems_interrupt_disable(level); |
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103 | syscon->rcc = (syscon->rcc & ~SYSCONRCC_PWMDIV_MSK) | SYSCONRCC_PWMDIV(div) |
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104 | | SYSCONRCC_USEPWMDIV; |
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105 | rtems_interrupt_enable(level); |
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106 | } |
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