source: rtems/c/src/lib/libbsp/arm/lm3s69xx/startup/bspstart.c @ 8bed603

4.11
Last change on this file since 8bed603 was 8bed603, checked in by Sebastian Huber <sebastian.huber@…>, on Jun 3, 2013 at 8:03:44 AM

bsp/lm3s69xx: Typos

  • Property mode set to 100644
File size: 2.9 KB
Line 
1/*
2 * Copyright © 2013 Eugeniy Meshcheryakov <eugen@debian.org>
3 *
4 * The license and distribution terms for this file may be
5 * found in the file LICENSE in this distribution or at
6 * http://www.rtems.com/license/LICENSE.
7 */
8
9#include <bsp.h>
10#include <bspopts.h>
11#include <bsp/irq-generic.h>
12#include <bsp/lm3s69xx.h>
13#include <bsp/io.h>
14#include <bsp/syscon.h>
15#include <assert.h>
16
17static void init_main_osc(void)
18{
19  volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
20
21  uint32_t sysdiv_val = LM3S69XX_PLL_FREQUENCY / LM3S69XX_SYSTEM_CLOCK;
22  assert(sysdiv_val * LM3S69XX_SYSTEM_CLOCK == LM3S69XX_PLL_FREQUENCY);
23  assert((sysdiv_val >= 4) && (sysdiv_val <= 16));
24
25  uint32_t rcc = syscon->rcc;
26
27  rcc = (rcc & ~SYSCONRCC_USESYSDIV) | SYSCONRCC_BYPASS;
28  syscon->rcc = rcc;
29
30  rcc = (rcc & ~(SYSCONRCC_PWRDN | SYSCONRCC_XTAL_MSK | SYSCONRCC_OSCSRC_MSK))
31      | SYSCONRCC_XTAL(LM3S69XX_XTAL_CONFIG) | SYSCONRCC_OSCSRC_MOSC;
32  syscon->rcc = rcc;
33
34  rcc = (rcc & ~SYSCONRCC_SYSDIV_MSK) | SYSCONRCC_SYSDIV(sysdiv_val / 2 - 1)
35      | SYSCONRCC_USESYSDIV;
36  syscon->rcc = rcc;
37
38  while ((syscon->ris & SYSCONRIS_PLLLRIS) == 0)
39      /* Wait for PLL lock */;
40
41  rcc &= ~SYSCONRCC_BYPASS;
42  syscon->rcc = rcc;
43}
44
45static const lm3s69xx_gpio_config start_config_gpio[] = {
46#ifdef LM3S69XX_ENABLE_UART_0
47#if defined(LM3S69XX_MCU_LM3S3749) || defined(LM3S69XX_MCU_LM3S6965)
48  LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_A, 0),
49  LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_A, 1),
50#else
51#error No GPIO pin configuration for UART 0
52#endif
53#endif /* LM3S69XX_ENABLE_UART_0 */
54
55#ifdef LM3S69XX_ENABLE_UART_1
56#if defined(LM3S69XX_MCU_LM3S3749)
57  LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_B, 0),
58  LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_B, 1),
59#elif defined(LM3S69XX_MCU_LM3S6965)
60  LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_D, 2),
61  LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_D, 3),
62#else
63#error No GPIO pin configuration for UART 1
64#endif
65#endif /* LM3S69XX_ENABLE_UART_1 */
66
67#ifdef LM3S69XX_ENABLE_UART_2
68#if defined(LM3S69XX_MCU_LM3S3749)
69  LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_D, 0),
70  LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_D, 1),
71#elif defined(LM3S69XX_MCU_LM3S6965)
72  LM3S69XX_PIN_UART_RX(LM3S69XX_PORT_G, 0),
73  LM3S69XX_PIN_UART_TX(LM3S69XX_PORT_G, 1),
74#else
75#error No GPIO pin configuration for UART 2
76#endif
77#endif /* LM3S69XX_ENABLE_UART_2 */
78};
79
80static void init_gpio(void)
81{
82#if LM3S69XX_USE_AHB_FOR_GPIO
83  volatile lm3s69xx_syscon *syscon = LM3S69XX_SYSCON;
84
85  syscon->gpiohbctl |= SYSCONGPIOHBCTL_PORTA | SYSCONGPIOHBCTL_PORTB
86      | SYSCONGPIOHBCTL_PORTC | SYSCONGPIOHBCTL_PORTD
87      | SYSCONGPIOHBCTL_PORTE | SYSCONGPIOHBCTL_PORTF
88      | SYSCONGPIOHBCTL_PORTG
89#if LM3S69XX_NUM_GPIO_BLOCKS > 7
90      | SYSCONGPIOHBCTL_PORTH
91#endif
92      ;
93
94#endif /* LM3S69XX_USE_AHB_FOR_GPIO */
95
96  lm3s69xx_gpio_set_config_array(start_config_gpio,
97      sizeof(start_config_gpio) / sizeof(start_config_gpio[0]));
98}
99
100void bsp_start(void)
101{
102  init_main_osc();
103  init_gpio();
104  bsp_interrupt_initialize();
105}
Note: See TracBrowser for help on using the repository browser.