1 | /*- |
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2 | * Copyright (c) 2014 Ian Lepore |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * 1. Redistributions of source code must retain the above copyright |
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9 | * notice, this list of conditions and the following disclaimer. |
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10 | * 2. Redistributions in binary form must reproduce the above copyright |
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11 | * notice, this list of conditions and the following disclaimer in the |
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12 | * documentation and/or other materials provided with the distribution. |
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13 | * |
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14 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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15 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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17 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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18 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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19 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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20 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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21 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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22 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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23 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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24 | * SUCH DAMAGE. |
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25 | * |
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26 | * $FreeBSD: head/sys/arm/freescale/imx/imx_iomux.c 321938 2017-08-02 18:28:06Z ian $ |
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27 | */ |
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28 | |
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29 | /* |
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30 | * Pin mux and pad control driver for imx5 and imx6. |
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31 | * |
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32 | * This driver implements the fdt_pinctrl interface for configuring the gpio and |
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33 | * peripheral pins based on fdt configuration data. |
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34 | * |
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35 | * When the driver attaches, it walks the entire fdt tree and automatically |
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36 | * configures the pins for each device which has a pinctrl-0 property and whose |
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37 | * status is "okay". In addition it implements the fdt_pinctrl_configure() |
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38 | * method which any other driver can call at any time to reconfigure its pins. |
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39 | * |
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40 | * The nature of the fsl,pins property in fdt data makes this driver's job very |
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41 | * easy. Instead of representing each pin and pad configuration using symbolic |
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42 | * properties such as pullup-enable="true" and so on, the data simply contains |
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43 | * the addresses of the registers that control the pins, and the raw values to |
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44 | * store in those registers. |
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45 | * |
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46 | * The imx5 and imx6 SoCs also have a small number of "general purpose |
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47 | * registers" in the iomuxc device which are used to control an assortment |
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48 | * of completely unrelated aspects of SoC behavior. This driver provides other |
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49 | * drivers with direct access to those registers via simple accessor functions. |
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50 | */ |
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51 | |
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52 | #include <sys/param.h> |
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53 | #ifndef __rtems__ |
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54 | #include <sys/systm.h> |
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55 | #include <sys/bus.h> |
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56 | #include <sys/kernel.h> |
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57 | #include <sys/module.h> |
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58 | #include <sys/malloc.h> |
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59 | #include <sys/rman.h> |
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60 | |
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61 | #include <machine/bus.h> |
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62 | |
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63 | #include <dev/ofw/openfirm.h> |
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64 | #include <dev/ofw/ofw_bus.h> |
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65 | #include <dev/ofw/ofw_bus_subr.h> |
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66 | #include <dev/fdt/fdt_pinctrl.h> |
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67 | #endif /* __rtems__ */ |
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68 | |
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69 | #include <arm/freescale/imx/imx_iomuxvar.h> |
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70 | #ifndef __rtems__ |
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71 | #include <arm/freescale/imx/imx_machdep.h> |
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72 | #else /* __rtems__ */ |
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73 | #include <bsp.h> |
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74 | #include <bsp/fdt.h> |
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75 | #include <rtems/sysinit.h> |
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76 | #include <errno.h> |
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77 | #include <libfdt.h> |
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78 | #include <stdlib.h> |
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79 | |
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80 | typedef size_t bus_size_t; |
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81 | typedef int phandle_t; |
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82 | #endif /* __rtems__ */ |
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83 | |
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84 | struct iomux_softc { |
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85 | #ifndef __rtems__ |
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86 | device_t dev; |
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87 | struct resource *mem_res; |
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88 | u_int last_gpregaddr; |
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89 | #else /* __rtems__ */ |
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90 | volatile uint32_t *regs; |
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91 | #endif /* __rtems__ */ |
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92 | }; |
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93 | |
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94 | #ifndef __rtems__ |
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95 | static struct iomux_softc *iomux_sc; |
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96 | |
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97 | static struct ofw_compat_data compat_data[] = { |
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98 | {"fsl,imx6dl-iomuxc", true}, |
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99 | {"fsl,imx6q-iomuxc", true}, |
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100 | {"fsl,imx6sl-iomuxc", true}, |
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101 | {"fsl,imx6ul-iomuxc", true}, |
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102 | {"fsl,imx6sx-iomuxc", true}, |
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103 | {"fsl,imx53-iomuxc", true}, |
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104 | {"fsl,imx51-iomuxc", true}, |
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105 | {NULL, false}, |
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106 | }; |
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107 | #else /* __rtems__ */ |
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108 | static struct iomux_softc iomux_sc_instance; |
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109 | |
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110 | #define iomux_sc (&iomux_sc_instance); |
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111 | |
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112 | static void |
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113 | imx_iomux_init(void) |
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114 | { |
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115 | const void *fdt; |
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116 | int node; |
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117 | struct iomux_softc *sc; |
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118 | |
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119 | fdt = bsp_fdt_get(); |
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120 | node = fdt_node_offset_by_compatible(fdt, -1, "fsl,imx7d-iomuxc"); |
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121 | sc = iomux_sc; |
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122 | sc->regs = imx_get_reg_of_node(fdt, node); |
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123 | } |
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124 | |
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125 | RTEMS_SYSINIT_ITEM(imx_iomux_init, RTEMS_SYSINIT_BSP_START, |
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126 | RTEMS_SYSINIT_ORDER_MIDDLE); |
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127 | |
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128 | #define OF_node_from_xref(phandle) fdt_node_offset_by_phandle(fdt, phandle) |
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129 | |
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130 | static int |
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131 | imx_iomux_getencprop_alloc(const char *fdt, int node, const char *name, |
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132 | size_t elsz, void **buf) |
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133 | { |
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134 | int len; |
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135 | const uint32_t *val; |
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136 | int i; |
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137 | uint32_t *cell; |
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138 | |
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139 | val = fdt_getprop(fdt, node, "fsl,pins", &len); |
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140 | if (val == NULL || len < 0 || len % elsz != 0) { |
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141 | return (-1); |
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142 | } |
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143 | |
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144 | cell = malloc((size_t)len); |
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145 | *buf = cell; |
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146 | if (cell == NULL) { |
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147 | return (-1); |
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148 | } |
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149 | |
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150 | for (i = 0; i < len / 4; ++i) { |
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151 | cell[i] = fdt32_to_cpu(val[i]); |
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152 | } |
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153 | |
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154 | return (len / (int)elsz); |
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155 | } |
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156 | |
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157 | #define OF_getencprop_alloc(node, name, elsz, buf) \ |
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158 | imx_iomux_getencprop_alloc(fdt, node, name, elsz, buf) |
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159 | |
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160 | #define OF_prop_free(buf) free(buf) |
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161 | #endif /* __rtems__ */ |
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162 | |
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163 | /* |
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164 | * Each tuple in an fsl,pins property contains these fields. |
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165 | */ |
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166 | struct pincfg { |
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167 | uint32_t mux_reg; |
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168 | uint32_t padconf_reg; |
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169 | uint32_t input_reg; |
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170 | uint32_t mux_val; |
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171 | uint32_t input_val; |
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172 | uint32_t padconf_val; |
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173 | }; |
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174 | |
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175 | #define PADCONF_NONE (1U << 31) /* Do not configure pad. */ |
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176 | #define PADCONF_SION (1U << 30) /* Force SION bit in mux register. */ |
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177 | #define PADMUX_SION (1U << 4) /* The SION bit in the mux register. */ |
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178 | |
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179 | static inline uint32_t |
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180 | RD4(struct iomux_softc *sc, bus_size_t off) |
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181 | { |
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182 | |
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183 | #ifndef __rtems__ |
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184 | return (bus_read_4(sc->mem_res, off)); |
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185 | #else /* __rtems__ */ |
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186 | return (sc->regs[off / 4]); |
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187 | #endif /* __rtems__ */ |
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188 | } |
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189 | |
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190 | static inline void |
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191 | WR4(struct iomux_softc *sc, bus_size_t off, uint32_t val) |
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192 | { |
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193 | |
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194 | #ifndef __rtems__ |
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195 | bus_write_4(sc->mem_res, off, val); |
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196 | #else /* __rtems__ */ |
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197 | sc->regs[off / 4] = val; |
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198 | #endif /* __rtems__ */ |
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199 | } |
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200 | |
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201 | static void |
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202 | iomux_configure_input(struct iomux_softc *sc, uint32_t reg, uint32_t val) |
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203 | { |
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204 | u_int select, mask, shift, width; |
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205 | |
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206 | /* If register and value are zero, there is nothing to configure. */ |
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207 | if (reg == 0 && val == 0) |
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208 | return; |
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209 | |
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210 | /* |
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211 | * If the config value has 0xff in the high byte it is encoded: |
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212 | * 31 23 15 7 0 |
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213 | * | 0xff | shift | width | select | |
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214 | * We need to mask out the old select value and OR in the new, using a |
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215 | * mask of the given width and shifting the values up by shift. |
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216 | */ |
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217 | if ((val & 0xff000000) == 0xff000000) { |
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218 | select = val & 0x000000ff; |
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219 | width = (val & 0x0000ff00) >> 8; |
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220 | shift = (val & 0x00ff0000) >> 16; |
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221 | mask = ((1u << width) - 1) << shift; |
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222 | val = (RD4(sc, reg) & ~mask) | (select << shift); |
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223 | } |
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224 | WR4(sc, reg, val); |
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225 | } |
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226 | |
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227 | #ifndef __rtems__ |
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228 | static int |
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229 | iomux_configure_pins(device_t dev, phandle_t cfgxref) |
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230 | #else /* __rtems__ */ |
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231 | int imx_iomux_configure_pins(const void *fdt, uint32_t cfgxref) |
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232 | #endif /* __rtems__ */ |
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233 | { |
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234 | struct iomux_softc *sc; |
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235 | struct pincfg *cfgtuples, *cfg; |
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236 | phandle_t cfgnode; |
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237 | int i, ntuples; |
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238 | uint32_t sion; |
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239 | |
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240 | #ifndef __rtems__ |
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241 | sc = device_get_softc(dev); |
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242 | #else /* __rtems__ */ |
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243 | sc = iomux_sc; |
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244 | #endif /* __rtems__ */ |
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245 | cfgnode = OF_node_from_xref(cfgxref); |
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246 | ntuples = OF_getencprop_alloc(cfgnode, "fsl,pins", sizeof(*cfgtuples), |
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247 | (void **)&cfgtuples); |
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248 | if (ntuples < 0) |
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249 | return (ENOENT); |
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250 | if (ntuples == 0) |
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251 | return (0); /* Empty property is not an error. */ |
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252 | for (i = 0, cfg = cfgtuples; i < ntuples; i++, cfg++) { |
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253 | sion = (cfg->padconf_val & PADCONF_SION) ? PADMUX_SION : 0; |
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254 | WR4(sc, cfg->mux_reg, cfg->mux_val | sion); |
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255 | iomux_configure_input(sc, cfg->input_reg, cfg->input_val); |
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256 | if ((cfg->padconf_val & PADCONF_NONE) == 0) |
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257 | WR4(sc, cfg->padconf_reg, cfg->padconf_val); |
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258 | #ifndef __rtems__ |
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259 | if (bootverbose) { |
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260 | char name[32]; |
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261 | OF_getprop(cfgnode, "name", &name, sizeof(name)); |
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262 | printf("%16s: muxreg 0x%04x muxval 0x%02x " |
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263 | "inpreg 0x%04x inpval 0x%02x " |
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264 | "padreg 0x%04x padval 0x%08x\n", |
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265 | name, cfg->mux_reg, cfg->mux_val | sion, |
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266 | cfg->input_reg, cfg->input_val, |
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267 | cfg->padconf_reg, cfg->padconf_val); |
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268 | } |
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269 | #endif /* __rtems__ */ |
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270 | } |
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271 | OF_prop_free(cfgtuples); |
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272 | return (0); |
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273 | } |
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274 | |
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275 | #ifndef __rtems__ |
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276 | static int |
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277 | iomux_probe(device_t dev) |
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278 | { |
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279 | |
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280 | if (!ofw_bus_status_okay(dev)) |
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281 | return (ENXIO); |
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282 | |
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283 | if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) |
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284 | return (ENXIO); |
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285 | |
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286 | device_set_desc(dev, "Freescale i.MX pin configuration"); |
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287 | return (BUS_PROBE_DEFAULT); |
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288 | } |
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289 | |
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290 | static int |
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291 | iomux_detach(device_t dev) |
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292 | { |
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293 | |
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294 | /* This device is always present. */ |
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295 | return (EBUSY); |
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296 | } |
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297 | |
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298 | static int |
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299 | iomux_attach(device_t dev) |
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300 | { |
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301 | struct iomux_softc * sc; |
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302 | int rid; |
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303 | |
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304 | sc = device_get_softc(dev); |
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305 | sc->dev = dev; |
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306 | |
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307 | switch (imx_soc_type()) { |
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308 | case IMXSOC_51: |
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309 | sc->last_gpregaddr = 1 * sizeof(uint32_t); |
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310 | break; |
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311 | case IMXSOC_53: |
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312 | sc->last_gpregaddr = 2 * sizeof(uint32_t); |
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313 | break; |
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314 | case IMXSOC_6DL: |
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315 | case IMXSOC_6S: |
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316 | case IMXSOC_6SL: |
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317 | case IMXSOC_6Q: |
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318 | sc->last_gpregaddr = 13 * sizeof(uint32_t); |
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319 | break; |
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320 | case IMXSOC_6UL: |
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321 | sc->last_gpregaddr = 14 * sizeof(uint32_t); |
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322 | break; |
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323 | default: |
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324 | device_printf(dev, "Unknown SoC type\n"); |
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325 | return (ENXIO); |
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326 | } |
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327 | |
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328 | rid = 0; |
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329 | sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, |
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330 | RF_ACTIVE); |
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331 | if (sc->mem_res == NULL) { |
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332 | device_printf(dev, "Cannot allocate memory resources\n"); |
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333 | return (ENXIO); |
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334 | } |
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335 | |
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336 | iomux_sc = sc; |
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337 | |
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338 | /* |
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339 | * Register as a pinctrl device, and call the convenience function that |
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340 | * walks the entire device tree invoking FDT_PINCTRL_CONFIGURE() on any |
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341 | * pinctrl-0 property cells whose xref phandle refers to a configuration |
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342 | * that is a child node of our node in the tree. |
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343 | * |
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344 | * The pinctrl bindings documentation specifically mentions that the |
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345 | * pinctrl device itself may have a pinctrl-0 property which contains |
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346 | * static configuration to be applied at device init time. The tree |
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347 | * walk will automatically handle this for us when it passes through our |
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348 | * node in the tree. |
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349 | */ |
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350 | fdt_pinctrl_register(dev, "fsl,pins"); |
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351 | fdt_pinctrl_configure_tree(dev); |
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352 | |
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353 | return (0); |
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354 | } |
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355 | |
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356 | uint32_t |
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357 | imx_iomux_gpr_get(u_int regaddr) |
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358 | { |
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359 | struct iomux_softc * sc; |
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360 | |
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361 | sc = iomux_sc; |
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362 | KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__)); |
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363 | KASSERT(regaddr >= 0 && regaddr <= sc->last_gpregaddr, |
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364 | ("%s bad regaddr %u, max %u", __FUNCTION__, regaddr, |
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365 | sc->last_gpregaddr)); |
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366 | |
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367 | return (RD4(iomux_sc, regaddr)); |
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368 | } |
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369 | |
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370 | void |
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371 | imx_iomux_gpr_set(u_int regaddr, uint32_t val) |
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372 | { |
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373 | struct iomux_softc * sc; |
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374 | |
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375 | sc = iomux_sc; |
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376 | KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__)); |
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377 | KASSERT(regaddr >= 0 && regaddr <= sc->last_gpregaddr, |
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378 | ("%s bad regaddr %u, max %u", __FUNCTION__, regaddr, |
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379 | sc->last_gpregaddr)); |
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380 | |
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381 | WR4(iomux_sc, regaddr, val); |
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382 | } |
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383 | |
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384 | void |
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385 | imx_iomux_gpr_set_masked(u_int regaddr, uint32_t clrbits, uint32_t setbits) |
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386 | { |
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387 | struct iomux_softc * sc; |
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388 | uint32_t val; |
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389 | |
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390 | sc = iomux_sc; |
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391 | KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__)); |
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392 | KASSERT(regaddr >= 0 && regaddr <= sc->last_gpregaddr, |
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393 | ("%s bad regaddr %u, max %u", __FUNCTION__, regaddr, |
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394 | sc->last_gpregaddr)); |
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395 | |
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396 | val = RD4(iomux_sc, regaddr * 4); |
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397 | val = (val & ~clrbits) | setbits; |
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398 | WR4(iomux_sc, regaddr, val); |
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399 | } |
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400 | |
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401 | static device_method_t imx_iomux_methods[] = { |
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402 | /* Device interface */ |
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403 | DEVMETHOD(device_probe, iomux_probe), |
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404 | DEVMETHOD(device_attach, iomux_attach), |
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405 | DEVMETHOD(device_detach, iomux_detach), |
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406 | |
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407 | /* fdt_pinctrl interface */ |
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408 | DEVMETHOD(fdt_pinctrl_configure,iomux_configure_pins), |
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409 | |
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410 | DEVMETHOD_END |
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411 | }; |
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412 | |
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413 | static driver_t imx_iomux_driver = { |
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414 | "imx_iomux", |
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415 | imx_iomux_methods, |
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416 | sizeof(struct iomux_softc), |
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417 | }; |
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418 | |
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419 | static devclass_t imx_iomux_devclass; |
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420 | |
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421 | EARLY_DRIVER_MODULE(imx_iomux, simplebus, imx_iomux_driver, |
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422 | imx_iomux_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_LATE); |
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423 | |
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424 | #endif /* __rtems__ */ |
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