source: rtems/c/src/lib/libbsp/arm/imx/startup/bspstarthooks.c @ 29919242

5
Last change on this file since 29919242 was 29919242, checked in by Sebastian Huber <sebastian.huber@…>, on 09/22/17 at 11:48:40

bsp/imx: Add SMP support

Update #3090.

  • Property mode set to 100644
File size: 1.6 KB
Line 
1/*
2 * Copyright (c) 2013, 2017 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
16
17#include <bsp.h>
18#include <bsp/start.h>
19#include <bsp/arm-cp15-start.h>
20#include <bsp/arm-a9mpcore-start.h>
21
22BSP_START_DATA_SECTION static const arm_cp15_start_section_config
23imx_mmu_config_table[] = {
24  ARMV7_CP15_START_DEFAULT_SECTIONS,
25  {
26    .begin = 0x07000000U,
27    .end = 0x70000000U,
28    .flags = ARMV7_MMU_DEVICE
29  }
30};
31
32BSP_START_TEXT_SECTION static void setup_mmu_and_cache(void)
33{
34  uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
35    ARM_CP15_CTRL_A,
36    ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
37  );
38
39  arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
40    ctrl,
41    (uint32_t *) bsp_translation_table_base,
42    ARM_MMU_DEFAULT_CLIENT_DOMAIN,
43    &imx_mmu_config_table[0],
44    RTEMS_ARRAY_SIZE(imx_mmu_config_table)
45  );
46}
47
48BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
49{
50#ifdef RTEMS_SMP
51  uint32_t cpu_id = arm_cortex_a9_get_multiprocessor_cpu_id();
52
53  arm_a9mpcore_start_enable_smp_in_auxiliary_control();
54
55  if (cpu_id != 0) {
56    arm_a9mpcore_start_on_secondary_processor();
57  }
58#endif
59}
60
61BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
62{
63  arm_a9mpcore_start_set_vector_base();
64  bsp_start_copy_sections();
65  setup_mmu_and_cache();
66  bsp_start_clear_bss();
67}
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