source: rtems/c/src/lib/libbsp/arm/imx/include/arm/freescale/imx/imx_uartreg.h @ 694c31f9

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Last change on this file since 694c31f9 was 694c31f9, checked in by Sebastian Huber <sebastian.huber@…>, on 08/03/17 at 06:53:13

bsp/imx: New BSP

Update #3090.
  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*
2 * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#ifndef IMX_UARTREG_H
16#define IMX_UARTREG_H
17
18#include <bsp/utility.h>
19
20typedef struct {
21        uint32_t urxd;
22#define IMX_UART_URXD_CHARRDY BSP_BIT32(15)
23#define IMX_UART_URXD_ERR BSP_BIT32(14)
24#define IMX_UART_URXD_OVRRUN BSP_BIT32(13)
25#define IMX_UART_URXD_FRMERR BSP_BIT32(12)
26#define IMX_UART_URXD_BRK BSP_BIT32(11)
27#define IMX_UART_URXD_PRERR BSP_BIT32(10)
28#define IMX_UART_URXD_RX_DATA(val) BSP_FLD32(val, 0, 7)
29#define IMX_UART_URXD_RX_DATA_GET(reg) BSP_FLD32GET(reg, 0, 7)
30#define IMX_UART_URXD_RX_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
31        uint32_t reserved_04[15];
32        uint32_t utxd;
33#define IMX_UART_UTXD_TX_DATA(val) BSP_FLD32(val, 0, 7)
34#define IMX_UART_UTXD_TX_DATA_GET(reg) BSP_FLD32GET(reg, 0, 7)
35#define IMX_UART_UTXD_TX_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
36        uint32_t reserved_44[15];
37        uint32_t ucr1;
38#define IMX_UART_UCR1_ADEN BSP_BIT32(15)
39#define IMX_UART_UCR1_ADBR BSP_BIT32(14)
40#define IMX_UART_UCR1_TRDYEN BSP_BIT32(13)
41#define IMX_UART_UCR1_IDEN BSP_BIT32(12)
42#define IMX_UART_UCR1_ICD(val) BSP_FLD32(val, 10, 11)
43#define IMX_UART_UCR1_ICD_GET(reg) BSP_FLD32GET(reg, 10, 11)
44#define IMX_UART_UCR1_ICD_SET(reg, val) BSP_FLD32SET(reg, val, 10, 11)
45#define IMX_UART_UCR1_RRDYEN BSP_BIT32(9)
46#define IMX_UART_UCR1_RXDMAEN BSP_BIT32(8)
47#define IMX_UART_UCR1_IREN BSP_BIT32(7)
48#define IMX_UART_UCR1_TXMPTYEN BSP_BIT32(6)
49#define IMX_UART_UCR1_RTSDEN BSP_BIT32(5)
50#define IMX_UART_UCR1_SNDBRK BSP_BIT32(4)
51#define IMX_UART_UCR1_TXDMAEN BSP_BIT32(3)
52#define IMX_UART_UCR1_ATDMAEN BSP_BIT32(2)
53#define IMX_UART_UCR1_DOZE BSP_BIT32(1)
54#define IMX_UART_UCR1_UARTEN BSP_BIT32(0)
55        uint32_t ucr2;
56#define IMX_UART_UCR2_ESCI BSP_BIT32(15)
57#define IMX_UART_UCR2_IRTS BSP_BIT32(14)
58#define IMX_UART_UCR2_CTSC BSP_BIT32(13)
59#define IMX_UART_UCR2_CTS BSP_BIT32(12)
60#define IMX_UART_UCR2_ESCEN BSP_BIT32(11)
61#define IMX_UART_UCR2_RTEC(val) BSP_FLD32(val, 9, 10)
62#define IMX_UART_UCR2_RTEC_GET(reg) BSP_FLD32GET(reg, 9, 10)
63#define IMX_UART_UCR2_RTEC_SET(reg, val) BSP_FLD32SET(reg, val, 9, 10)
64#define IMX_UART_UCR2_PREN BSP_BIT32(8)
65#define IMX_UART_UCR2_PROE BSP_BIT32(7)
66#define IMX_UART_UCR2_STPB BSP_BIT32(6)
67#define IMX_UART_UCR2_WS BSP_BIT32(5)
68#define IMX_UART_UCR2_RTSEN BSP_BIT32(4)
69#define IMX_UART_UCR2_ATEN BSP_BIT32(3)
70#define IMX_UART_UCR2_TXEN BSP_BIT32(2)
71#define IMX_UART_UCR2_RXEN BSP_BIT32(1)
72#define IMX_UART_UCR2_SRST BSP_BIT32(0)
73        uint32_t ucr3;
74#define IMX_UART_UCR3_DPEC(val) BSP_FLD32(val, 14, 15)
75#define IMX_UART_UCR3_DPEC_GET(reg) BSP_FLD32GET(reg, 14, 15)
76#define IMX_UART_UCR3_DPEC_SET(reg, val) BSP_FLD32SET(reg, val, 14, 15)
77#define IMX_UART_UCR3_DTREN BSP_BIT32(13)
78#define IMX_UART_UCR3_PARERREN BSP_BIT32(12)
79#define IMX_UART_UCR3_FRAERREN BSP_BIT32(11)
80#define IMX_UART_UCR3_DSR BSP_BIT32(10)
81#define IMX_UART_UCR3_DCD BSP_BIT32(9)
82#define IMX_UART_UCR3_RI BSP_BIT32(8)
83#define IMX_UART_UCR3_ADNIMP BSP_BIT32(7)
84#define IMX_UART_UCR3_RXDSEN BSP_BIT32(6)
85#define IMX_UART_UCR3_AIRINTEN BSP_BIT32(5)
86#define IMX_UART_UCR3_AWAKEN BSP_BIT32(4)
87#define IMX_UART_UCR3_DTRDEN BSP_BIT32(3)
88#define IMX_UART_UCR3_RXDMUXSEL BSP_BIT32(2)
89#define IMX_UART_UCR3_INVT BSP_BIT32(1)
90#define IMX_UART_UCR3_ACIEN BSP_BIT32(0)
91        uint32_t ucr4;
92#define IMX_UART_UCR4_CTSTL(val) BSP_FLD32(val, 10, 15)
93#define IMX_UART_UCR4_CTSTL_GET(reg) BSP_FLD32GET(reg, 10, 15)
94#define IMX_UART_UCR4_CTSTL_SET(reg, val) BSP_FLD32SET(reg, val, 10, 15)
95#define IMX_UART_UCR4_INVR BSP_BIT32(9)
96#define IMX_UART_UCR4_ENIRI BSP_BIT32(8)
97#define IMX_UART_UCR4_WKEN BSP_BIT32(7)
98#define IMX_UART_UCR4_IDDMAEN BSP_BIT32(6)
99#define IMX_UART_UCR4_IRSC BSP_BIT32(5)
100#define IMX_UART_UCR4_LPBYP BSP_BIT32(4)
101#define IMX_UART_UCR4_TCEN BSP_BIT32(3)
102#define IMX_UART_UCR4_BKEN BSP_BIT32(2)
103#define IMX_UART_UCR4_OREN BSP_BIT32(1)
104#define IMX_UART_UCR4_DREN BSP_BIT32(0)
105        uint32_t ufcr;
106#define IMX_UART_UFCR_TXTL(val) BSP_FLD32(val, 10, 15)
107#define IMX_UART_UFCR_TXTL_GET(reg) BSP_FLD32GET(reg, 10, 15)
108#define IMX_UART_UFCR_TXTL_SET(reg, val) BSP_FLD32SET(reg, val, 10, 15)
109#define IMX_UART_UFCR_RFDIV(val) BSP_FLD32(val, 7, 9)
110#define IMX_UART_UFCR_RFDIV_GET(reg) BSP_FLD32GET(reg, 7, 9)
111#define IMX_UART_UFCR_RFDIV_SET(reg, val) BSP_FLD32SET(reg, val, 7, 9)
112#define IMX_UART_UFCR_DCEDTE BSP_BIT32(6)
113#define IMX_UART_UFCR_RXTL(val) BSP_FLD32(val, 0, 5)
114#define IMX_UART_UFCR_RXTL_GET(reg) BSP_FLD32GET(reg, 0, 5)
115#define IMX_UART_UFCR_RXTL_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
116        uint32_t usr1;
117#define IMX_UART_USR1_PARITYERR BSP_BIT32(15)
118#define IMX_UART_USR1_RTSS BSP_BIT32(14)
119#define IMX_UART_USR1_TRDY BSP_BIT32(13)
120#define IMX_UART_USR1_RTSD BSP_BIT32(12)
121#define IMX_UART_USR1_ESCF BSP_BIT32(11)
122#define IMX_UART_USR1_FRAMERR BSP_BIT32(10)
123#define IMX_UART_USR1_RRDY BSP_BIT32(9)
124#define IMX_UART_USR1_AGTIM BSP_BIT32(8)
125#define IMX_UART_USR1_DTRD BSP_BIT32(7)
126#define IMX_UART_USR1_RXDS BSP_BIT32(6)
127#define IMX_UART_USR1_AIRINT BSP_BIT32(5)
128#define IMX_UART_USR1_AWAKE BSP_BIT32(4)
129#define IMX_UART_USR1_SAD BSP_BIT32(3)
130        uint32_t usr2;
131#define IMX_UART_USR2_ADET BSP_BIT32(15)
132#define IMX_UART_USR2_TXFE BSP_BIT32(14)
133#define IMX_UART_USR2_DTRF BSP_BIT32(13)
134#define IMX_UART_USR2_IDLE BSP_BIT32(12)
135#define IMX_UART_USR2_ACST BSP_BIT32(11)
136#define IMX_UART_USR2_RIDELT BSP_BIT32(10)
137#define IMX_UART_USR2_RIIN BSP_BIT32(9)
138#define IMX_UART_USR2_IRINT BSP_BIT32(8)
139#define IMX_UART_USR2_WAKE BSP_BIT32(7)
140#define IMX_UART_USR2_DCDDELT BSP_BIT32(6)
141#define IMX_UART_USR2_DCDIN BSP_BIT32(5)
142#define IMX_UART_USR2_RTSF BSP_BIT32(4)
143#define IMX_UART_USR2_TXDC BSP_BIT32(3)
144#define IMX_UART_USR2_BRCD BSP_BIT32(2)
145#define IMX_UART_USR2_ORE BSP_BIT32(1)
146#define IMX_UART_USR2_RDR BSP_BIT32(0)
147        uint32_t uesc;
148        uint32_t utim;
149        uint32_t ubir;
150        uint32_t ubmr;
151        uint32_t ubrc;
152        uint32_t onems;
153        uint32_t uts;
154#define IMX_UART_UTS_FRCPERR BSP_BIT32(13)
155#define IMX_UART_UTS_LOOP BSP_BIT32(12)
156#define IMX_UART_UTS_DBGEN BSP_BIT32(11)
157#define IMX_UART_UTS_LOOPIR BSP_BIT32(10)
158#define IMX_UART_UTS_RXDBG BSP_BIT32(9)
159#define IMX_UART_UTS_TXEMPTY BSP_BIT32(6)
160#define IMX_UART_UTS_RXEMPTY BSP_BIT32(5)
161#define IMX_UART_UTS_TXFULL BSP_BIT32(4)
162#define IMX_UART_UTS_RXFULL BSP_BIT32(3)
163#define IMX_UART_UTS_SOFTRST BSP_BIT32(0)
164        uint32_t umcr;
165#define IMX_UART_UMCR_SLADDR(val) BSP_FLD32(val, 8, 15)
166#define IMX_UART_UMCR_SLADDR_GET(reg) BSP_FLD32GET(reg, 8, 15)
167#define IMX_UART_UMCR_SLADDR_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
168#define IMX_UART_UMCR_SADEN BSP_BIT32(3)
169#define IMX_UART_UMCR_TXB8 BSP_BIT32(2)
170#define IMX_UART_UMCR_SLAM BSP_BIT32(1)
171#define IMX_UART_UMCR_MDEN BSP_BIT32(0)
172} imx_uart;
173
174#endif /* IMX_UARTREG_H */
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