source: rtems/c/src/lib/libbsp/arm/gumstix/start/start.S @ 6e27be70

4.104.115
Last change on this file since 6e27be70 was 6e27be70, checked in by Joel Sherrill <joel.sherrill@…>, on 06/04/09 at 16:23:11

2009-06-04 Xi Yang <hiyangxi@…>

  • .cvsignore, ChangeLog?, Makefile.am, README, bsp_specs, configure.ac, preinstall.am, console/uarts.c, include/bsp.h, include/bspopts.h.in, include/tm27.h, start/start.S, startup/bspstart.c, startup/linkcmds, startup/memmap.c: New files.
  • Property mode set to 100755
File size: 4.2 KB
Line 
1/*
2 *  By Yang Xi <hiyangxi@gmail.com>.
3 *  Based upon CSB336
4 *
5 *  The license and distribution terms for this file may be
6 *  found in the file LICENSE in this distribution or at
7 *  http://www.rtems.com/license/LICENSE.
8 *
9 *  $Id$
10 */
11
12               
13/* Some standard definitions...*/
14.equ PSR_MODE_USR,       0x10
15.equ PSR_MODE_FIQ,       0x11
16.equ PSR_MODE_IRQ,       0x12
17.equ PSR_MODE_SVC,       0x13
18.equ PSR_MODE_ABT,       0x17
19.equ PSR_MODE_UNDEF,     0x1B
20.equ PSR_MODE_SYS,       0x1F
21
22.equ PSR_I,              0x80
23.equ PSR_F,              0x40
24.equ PSR_T,              0x20
25
26.text
27.globl  _start
28_start:
29        /*
30         * Since I don't plan to return to the bootloader,
31         * I don't have to save the registers.
32         *
33         * I'll just set the CPSR for SVC mode, interrupts
34         * off, and ARM instructions.
35         */
36        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
37        msr     cpsr, r0
38
39
40        /* zero the bss */
41        ldr     r1, =_bss_end_
42        ldr     r0, =_bss_start_
43
44_bss_init:       
45        mov     r2, #0
46        cmp     r0, r1
47        strlot  r2, [r0], #4
48        blo     _bss_init        /* loop while r0 < r1 */
49
50        /* --- Initialize stack pointer registers */
51        /* Enter IRQ mode and set up the IRQ stack pointer */
52        mov     r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)     /* No interrupts */
53        msr     cpsr, r0
54        ldr     r1, =_irq_stack_size
55        ldr     sp, =_irq_stack
56        add     sp, sp, r1
57
58        /* Enter FIQ mode and set up the FIQ stack pointer */
59        mov     r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)     /* No interrupts */
60        msr     cpsr, r0
61        ldr     r1, =_fiq_stack_size
62        ldr     sp, =_fiq_stack
63        add     sp, sp, r1
64
65        /* Enter ABT mode and set up the ABT stack pointer */
66        mov     r0, #(PSR_MODE_ABT | PSR_I | PSR_F)     /* No interrupts */
67        msr     cpsr, r0
68        ldr     r1, =_abt_stack_size
69        ldr     sp, =_abt_stack
70        add     sp, sp, r1
71       
72        /* Set up the SVC stack pointer last and stay in SVC mode */
73        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)     /* No interrupts */
74        msr     cpsr, r0
75        ldr     r1, =_svc_stack_size
76        ldr     sp, =_svc_stack
77        add     sp, sp, r1
78        sub     sp, sp, #0x64   
79
80        /*
81         * Initialize the MMU. After we return, the MMU is enabled,
82         * and memory may be remapped. I hope we don't remap this
83         * memory away.
84         */
85
86        ldr     r0, =mem_map
87        bl      mmu_init
88
89
90
91        /*
92         * Initialize the exception vectors. This includes the
93         * exceptions vectors (0x00000000-0x0000001c), and the
94         * pointers to the exception handlers (0x00000020-0x0000003c).
95         */
96        mov     r0, #0
97        adr     r1, vector_block
98        ldmia   r1!, {r2-r9}
99        stmia   r0!, {r2-r9}
100        ldmia   r1!, {r2-r9}
101        stmia   r0!, {r2-r9}
102
103
104
105        /* Now we are prepared to start the BSP's C code */
106        bl      boot_card
107
108        /*
109         * Theoretically, we could return to what started us up,
110         * but we'd have to have saved the registers and stacks.
111         * Instead, we'll just reset.
112         */
113        bl      bsp_reset
114
115        /* We shouldn't get here. If we do, hang */
116_hang:  b       _hang
117
118       
119/*
120 * This is the exception vector table and the pointers to
121 * the functions that handle the exceptions. It's a total
122 * of 16 words (64 bytes)
123 */
124vector_block:   
125        ldr     pc, Reset_Handler
126        ldr     pc, Undefined_Handler
127        ldr     pc, SWI_Handler
128        ldr     pc, Prefetch_Handler
129        ldr     pc, Abort_Handler
130        nop
131        ldr     pc, IRQ_Handler
132        ldr     pc, FIQ_Handler
133
134Reset_Handler:          b       bsp_reset
135Undefined_Handler:      b       Undefined_Handler
136SWI_Handler:            b       SWI_Handler
137Prefetch_Handler:       b       Prefetch_Handler
138Abort_Handler:          b       Abort_Handler
139                        nop
140IRQ_Handler:            b       IRQ_Handler
141FIQ_Handler:            b       FIQ_Handler
142
143.globl Reset_Handler
144.globl Undefined_Handler
145.globl SWI_Handler
146.globl Prefetch_Handler
147.globl Abort_Handler
148.globl IRQ_Handler
149.globl FIQ_Handler
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