1 | /* |
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2 | * This file contains the ARM BSP startup package. It includes application, |
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3 | * board, and monitor specific initialization and configuration. The generic CPU |
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4 | * dependent initialization has been performed before this routine is invoked. |
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5 | * |
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6 | * |
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7 | * Copyright (c) 2000 Canon Research Centre France SA. |
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8 | * Emmanuel Raguet, mailto:raguet@crf.canon.fr |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.com/license/LICENSE. |
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13 | * |
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14 | * $Id$ |
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15 | */ |
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16 | |
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17 | #include <bsp.h> |
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18 | #include <rtems/bspIo.h> |
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19 | #include <s3c24xx.h> |
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20 | |
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21 | /* |
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22 | * External Prototypes |
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23 | */ |
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24 | extern void rtems_irq_mngt_init(void); |
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25 | |
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26 | /* |
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27 | * BSP specific Idle task |
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28 | */ |
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29 | Thread bsp_idle_task(uint32_t ignored) |
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30 | { |
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31 | while(1) { |
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32 | asm volatile ("MCR p15,0,r0,c7,c0,4 \n"); |
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33 | } |
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34 | } |
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35 | |
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36 | /* |
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37 | * BSP Specific Initialization in C |
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38 | */ |
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39 | void bsp_start_default( void ) |
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40 | { |
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41 | uint32_t cr; |
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42 | uint32_t pend,last; |
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43 | uint32_t REFCNT; |
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44 | int i; |
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45 | |
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46 | /* stop RTC */ |
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47 | #ifdef CPU_S3C2400 |
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48 | rTICINT = 0x0; |
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49 | #else |
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50 | rTICNT = 0x0; |
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51 | #endif |
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52 | /* stop watchdog,ADC and timers */ |
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53 | rWTCON = 0x0; |
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54 | rTCON = 0x0; |
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55 | rADCCON = 0x0; |
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56 | |
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57 | /* disable interrupts */ |
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58 | rINTMOD = 0x0; |
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59 | rINTMSK = BIT_ALLMSK; /* unmasked by drivers */ |
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60 | |
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61 | last = 0; |
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62 | for(i=0; i<4; i++) { |
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63 | pend = rSRCPND; |
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64 | if(pend == 0 || pend == last) |
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65 | break; |
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66 | rSRCPND = pend; |
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67 | rINTPND = pend; |
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68 | last = pend; |
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69 | } |
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70 | |
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71 | /* setup clocks */ |
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72 | rCLKDIVN = M_CLKDIVN; |
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73 | rMPLLCON = ((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV); |
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74 | /* setup rREFRESH |
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75 | * period = 15.6 us, HCLK=66Mhz, (2048+1-15.6*66) |
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76 | */ |
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77 | REFCNT = 2048+1-(15.6*get_HCLK()/1000000); |
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78 | rREFRESH = ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT); |
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79 | |
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80 | /* set prescaler for timers 2,3,4 to 16(15+1) */ |
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81 | cr = rTCFG0 & 0xFFFF00FF; |
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82 | rTCFG0 = (cr | (15<<8)); |
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83 | |
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84 | /* set prescaler for timers 0,1 to 1(0+1) */ |
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85 | cr = rTCFG0 & 0xFFFFFF00; |
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86 | rTCFG0 = (cr | (0<<0)); |
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87 | |
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88 | /* |
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89 | * Init rtems exceptions management |
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90 | */ |
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91 | rtems_exception_init_mngt(); |
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92 | |
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93 | /* |
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94 | * Init rtems interrupt management |
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95 | */ |
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96 | rtems_irq_mngt_init(); |
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97 | } |
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98 | |
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99 | /* |
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100 | * By making this a weak alias for bsp_start_default, a brave soul |
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101 | * can override the actual bsp_start routine used. |
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102 | */ |
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103 | |
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104 | void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default"))); |
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