source: rtems/c/src/lib/libbsp/arm/gp32/startup/bspstart.c @ 9b4422a2

4.11
Last change on this file since 9b4422a2 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on May 3, 2012 at 3:09:24 PM

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 2.3 KB
Line 
1/*
2 * This file contains the ARM BSP startup package. It includes application,
3 * board, and monitor specific initialization and configuration. The generic CPU
4 * dependent initialization has been performed before this routine is invoked.
5 *
6 *
7 * Copyright (c) 2000 Canon Research Centre France SA.
8 * Emmanuel Raguet, mailto:raguet@crf.canon.fr
9 *
10 *   The license and distribution terms for this file may be
11 *   found in the file LICENSE in this distribution or at
12 *   http://www.rtems.com/license/LICENSE.
13 */
14
15#include <bsp.h>
16#include <bsp/irq-generic.h>
17#include <rtems/bspIo.h>
18#include <s3c24xx.h>
19
20/*
21 * External Prototypes
22 */
23extern void rtems_exception_init_mngt(void);
24
25/*
26 *  BSP specific Idle task
27 */
28Thread bsp_idle_task(uint32_t ignored)
29{
30  while(1) {
31    __asm__ volatile ("MCR p15,0,r0,c7,c0,4     \n");
32  }
33}
34
35/*
36 *  BSP Specific Initialization in C
37 */
38void bsp_start_default( void )
39{
40  uint32_t cr;
41  uint32_t pend,last;
42  uint32_t REFCNT;
43  int i;
44
45  /* stop RTC */
46  #ifdef CPU_S3C2400
47    rTICINT = 0x0;
48  #else
49    rTICNT = 0x0;
50  #endif
51  /* stop watchdog,ADC and timers */
52  rWTCON = 0x0;
53  rTCON = 0x0;
54  rADCCON = 0x0;
55
56  /* disable interrupts */
57  rINTMOD = 0x0;
58  rINTMSK = BIT_ALLMSK; /* unmasked by drivers */
59
60  last = 0;
61  for(i=0; i<4; i++) {
62    pend = rSRCPND;
63    if(pend == 0 || pend == last)
64      break;
65    rSRCPND = pend;
66    rINTPND = pend;
67    last    = pend;
68  }
69
70  /* setup clocks */
71  rCLKDIVN = M_CLKDIVN;
72  rMPLLCON = ((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV);
73  /* setup rREFRESH
74   * period = 15.6 us, HCLK=66Mhz, (2048+1-15.6*66)
75   */
76  REFCNT   = 2048+1-(15.6*get_HCLK()/1000000);
77  rREFRESH = ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT);
78
79  /* set prescaler for timers 2,3,4 to 16(15+1) */
80  cr = rTCFG0 & 0xFFFF00FF;
81  rTCFG0 = (cr | (15<<8));
82
83  /* set prescaler for timers 0,1 to 1(0+1) */
84  cr = rTCFG0 & 0xFFFFFF00;
85  rTCFG0 = (cr | (0<<0));
86
87  /*
88   * Init rtems exceptions management
89   */
90  rtems_exception_init_mngt();
91
92  /*
93   * Init rtems interrupt management
94   */
95  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
96    _CPU_Fatal_halt(0xe);
97  }
98}
99
100/*
101 *  By making this a weak alias for bsp_start_default, a brave soul
102 *  can override the actual bsp_start routine used.
103 */
104
105void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
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