source: rtems/c/src/lib/libbsp/arm/gp32/startup/bspstart.c @ 5ae1cae

4.104.115
Last change on this file since 5ae1cae was 5ae1cae, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 30, 2010 at 2:30:09 PM

2010-04-30 Sebastian Huber <sebastian.huber@…>

  • Makefile.am, preinstall.am: Added generic interrupt support modules.
  • include/bsp.h: Define BSP_FEATURE_IRQ_EXTENSION.
  • startup/bspstart.c: Interrupt support changes.
  • Property mode set to 100644
File size: 2.3 KB
Line 
1/*
2 * This file contains the ARM BSP startup package. It includes application,
3 * board, and monitor specific initialization and configuration. The generic CPU
4 * dependent initialization has been performed before this routine is invoked.
5 *
6 *
7 * Copyright (c) 2000 Canon Research Centre France SA.
8 * Emmanuel Raguet, mailto:raguet@crf.canon.fr
9 *
10 *   The license and distribution terms for this file may be
11 *   found in found in the file LICENSE in this distribution or at
12 *   http://www.rtems.com/license/LICENSE.
13 *
14 * $Id$
15 */
16
17#include <bsp.h>
18#include <bsp/irq-generic.h>
19#include <rtems/bspIo.h>
20#include <s3c24xx.h>
21
22/*
23 * External Prototypes
24 */
25extern void rtems_exception_init_mngt(void);
26
27/*
28 *  BSP specific Idle task
29 */
30Thread bsp_idle_task(uint32_t ignored)
31{
32  while(1) {
33    asm volatile ("MCR p15,0,r0,c7,c0,4     \n");
34  }
35}
36
37/*
38 *  BSP Specific Initialization in C
39 */
40void bsp_start_default( void )
41{
42  uint32_t cr;
43  uint32_t pend,last;
44  uint32_t REFCNT;
45  int i;
46
47  /* stop RTC */
48  #ifdef CPU_S3C2400
49    rTICINT = 0x0;
50  #else
51    rTICNT = 0x0;
52  #endif
53  /* stop watchdog,ADC and timers */
54  rWTCON = 0x0;
55  rTCON = 0x0;
56  rADCCON = 0x0;
57
58  /* disable interrupts */
59  rINTMOD = 0x0;
60  rINTMSK = BIT_ALLMSK; /* unmasked by drivers */
61
62  last = 0;
63  for(i=0; i<4; i++) {
64    pend = rSRCPND;
65    if(pend == 0 || pend == last)
66      break;
67    rSRCPND = pend;
68    rINTPND = pend;
69    last    = pend;
70  }
71
72  /* setup clocks */
73  rCLKDIVN = M_CLKDIVN;
74  rMPLLCON = ((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV);
75  /* setup rREFRESH
76   * period = 15.6 us, HCLK=66Mhz, (2048+1-15.6*66)
77   */
78  REFCNT   = 2048+1-(15.6*get_HCLK()/1000000);
79  rREFRESH = ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT);
80
81  /* set prescaler for timers 2,3,4 to 16(15+1) */
82  cr = rTCFG0 & 0xFFFF00FF;
83  rTCFG0 = (cr | (15<<8));
84
85  /* set prescaler for timers 0,1 to 1(0+1) */
86  cr = rTCFG0 & 0xFFFFFF00;
87  rTCFG0 = (cr | (0<<0));
88
89  /*
90   * Init rtems exceptions management
91   */
92  rtems_exception_init_mngt();
93
94  /*
95   * Init rtems interrupt management
96   */
97  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
98    _CPU_Fatal_halt(0xe);
99  }
100}
101
102/*
103 *  By making this a weak alias for bsp_start_default, a brave soul
104 *  can override the actual bsp_start routine used.
105 */
106
107void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
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