source: rtems/c/src/lib/libbsp/arm/gp32/startup/bspstart.c @ 32b8506

4.104.115
Last change on this file since 32b8506 was 32b8506, checked in by Ralf Corsepius <ralf.corsepius@…>, on 11/29/09 at 14:53:02

Whitespace removal.

  • Property mode set to 100644
File size: 2.2 KB
RevLine 
[cdeed304]1/*
2 * This file contains the ARM BSP startup package. It includes application,
3 * board, and monitor specific initialization and configuration. The generic CPU
[32b8506]4 * dependent initialization has been performed before this routine is invoked.
[cdeed304]5 *
6 *
7 * Copyright (c) 2000 Canon Research Centre France SA.
8 * Emmanuel Raguet, mailto:raguet@crf.canon.fr
9 *
10 *   The license and distribution terms for this file may be
11 *   found in found in the file LICENSE in this distribution or at
12 *   http://www.rtems.com/license/LICENSE.
13 *
[bf7e13f]14 * $Id$
[32b8506]15 */
[e8c785c6]16
17#include <bsp.h>
[17a5e1d8]18#include <rtems/bspIo.h>
[0542a23]19#include <s3c24xx.h>
[e8c785c6]20
[cdeed304]21/*
22 * External Prototypes
23 */
[e8c785c6]24extern void rtems_irq_mngt_init(void);
[4bc22a6d]25
[cdeed304]26/*
27 *  BSP specific Idle task
28 */
[6710d81]29Thread bsp_idle_task(uint32_t ignored)
[4bc22a6d]30{
[6710d81]31  while(1) {
32    asm volatile ("MCR p15,0,r0,c7,c0,4     \n");
33  }
[4bc22a6d]34}
[32b8506]35
[cdeed304]36/*
37 *  BSP Specific Initialization in C
38 */
[e8c785c6]39void bsp_start_default( void )
40{
[cdeed304]41  uint32_t cr;
42  uint32_t pend,last;
43  uint32_t REFCNT;
44  int i;
45
46  /* stop RTC */
47  #ifdef CPU_S3C2400
48    rTICINT = 0x0;
49  #else
50    rTICNT = 0x0;
51  #endif
52  /* stop watchdog,ADC and timers */
53  rWTCON = 0x0;
54  rTCON = 0x0;
55  rADCCON = 0x0;
56
57  /* disable interrupts */
58  rINTMOD = 0x0;
59  rINTMSK = BIT_ALLMSK; /* unmasked by drivers */
60
61  last = 0;
62  for(i=0; i<4; i++) {
63    pend = rSRCPND;
64    if(pend == 0 || pend == last)
65      break;
66    rSRCPND = pend;
67    rINTPND = pend;
68    last    = pend;
69  }
[e8c785c6]70
[cdeed304]71  /* setup clocks */
72  rCLKDIVN = M_CLKDIVN;
73  rMPLLCON = ((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV);
74  /* setup rREFRESH
75   * period = 15.6 us, HCLK=66Mhz, (2048+1-15.6*66)
76   */
77  REFCNT   = 2048+1-(15.6*get_HCLK()/1000000);
78  rREFRESH = ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT);
79
80  /* set prescaler for timers 2,3,4 to 16(15+1) */
81  cr = rTCFG0 & 0xFFFF00FF;
82  rTCFG0 = (cr | (15<<8));
83
84  /* set prescaler for timers 0,1 to 1(0+1) */
85  cr = rTCFG0 & 0xFFFFFF00;
86  rTCFG0 = (cr | (0<<0));
87
88  /*
89   * Init rtems exceptions management
90   */
91  rtems_exception_init_mngt();
92
93  /*
94   * Init rtems interrupt management
95   */
96  rtems_irq_mngt_init();
[e8c785c6]97}
98
99/*
100 *  By making this a weak alias for bsp_start_default, a brave soul
101 *  can override the actual bsp_start routine used.
102 */
103
104void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
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