4.115
Last change
on this file since 991fdb33 was
97d0b9b,
checked in by Chris Johns <chrisj@…>, on 05/26/14 at 11:48:36
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bsp/gdbarmsim: Switch to the standard arm/shared/startup.
Switch to the standard ARM startup code. This requires adding the
standard interrupt code. The interrupt code does nothing at this
point in time. I do not know if the ARM simulator in GDB supports
interrupts.
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Property mode set to
100644
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File size:
1.0 KB
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1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup bsp_interrupt |
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5 | * |
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6 | * @brief GDB ARM Simulator interrupt support. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Obere Lagerstr. 30 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.org/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #include <rtems/score/armv4.h> |
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24 | |
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25 | #include <bsp.h> |
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26 | #include <bsp/irq.h> |
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27 | #include <bsp/irq-generic.h> |
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28 | |
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29 | #ifdef ARM_MULTILIB_ARCH_V4 |
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30 | |
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31 | void bsp_interrupt_dispatch(void) |
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32 | { |
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33 | /* Read current vector number */ |
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34 | /* rtems_vector_number vector = VICVectAddr; */ |
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35 | rtems_vector_number vector = 0; |
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36 | |
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37 | /* Enable interrupts in program status register */ |
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38 | uint32_t psr = _ARMV4_Status_irq_enable(); |
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39 | |
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40 | /* Dispatch interrupt handlers */ |
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41 | bsp_interrupt_handler_dispatch(vector); |
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42 | |
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43 | /* Restore program status register */ |
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44 | _ARMV4_Status_restore(psr); |
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45 | |
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46 | /* Acknowledge interrupt */ |
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47 | //VICVectAddr = 0; |
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48 | } |
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49 | |
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50 | #endif /* ARM_MULTILIB_ARCH_V4 */ |
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