source: rtems/c/src/lib/libbsp/arm/gdbarmsim/irq/irq-dispatch.c @ 991fdb33

4.115
Last change on this file since 991fdb33 was 97d0b9b, checked in by Chris Johns <chrisj@…>, on 05/26/14 at 11:48:36

bsp/gdbarmsim: Switch to the standard arm/shared/startup.

Switch to the standard ARM startup code. This requires adding the
standard interrupt code. The interrupt code does nothing at this
point in time. I do not know if the ARM simulator in GDB supports
interrupts.
  • Property mode set to 100644
File size: 1.0 KB
RevLine 
[97d0b9b]1/**
2 * @file
3 *
4 * @ingroup bsp_interrupt
5 *
6 * @brief GDB ARM Simulator interrupt support.
7 */
8
9/*
10 * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Obere Lagerstr. 30
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#include <rtems/score/armv4.h>
24
25#include <bsp.h>
26#include <bsp/irq.h>
27#include <bsp/irq-generic.h>
28
29#ifdef ARM_MULTILIB_ARCH_V4
30
31void bsp_interrupt_dispatch(void)
32{
33  /* Read current vector number */
34  /* rtems_vector_number vector = VICVectAddr; */
35  rtems_vector_number vector = 0;
36
37  /* Enable interrupts in program status register */
38  uint32_t psr = _ARMV4_Status_irq_enable();
39
40  /* Dispatch interrupt handlers */
41  bsp_interrupt_handler_dispatch(vector);
42
43  /* Restore program status register */
44  _ARMV4_Status_restore(psr);
45
46  /* Acknowledge interrupt */
47  //VICVectAddr = 0;
48}
49
50#endif /* ARM_MULTILIB_ARCH_V4 */
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